forked from OSchip/llvm-project
[gn build] (manually) port 6d45558c1a
(MipsGenPostLegalizeGICombiner)
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@ -30,6 +30,15 @@ tablegen("MipsGenMCPseudoLowering") {
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td_file = "Mips.td"
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td_file = "Mips.td"
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}
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}
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tablegen("MipsGenPostLegalizeGICombiner") {
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visibility = [ ":LLVMMipsCodeGen" ]
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args = [
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"-gen-global-isel-combiner",
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"-combiners=MipsPostLegalizerCombinerHelper",
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]
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td_file = "Mips.td"
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}
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tablegen("MipsGenRegisterBank") {
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tablegen("MipsGenRegisterBank") {
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visibility = [ ":LLVMMipsCodeGen" ]
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visibility = [ ":LLVMMipsCodeGen" ]
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args = [ "-gen-register-bank" ]
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args = [ "-gen-register-bank" ]
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@ -43,6 +52,7 @@ static_library("LLVMMipsCodeGen") {
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":MipsGenFastISel",
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":MipsGenFastISel",
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":MipsGenGlobalISel",
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":MipsGenGlobalISel",
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":MipsGenMCPseudoLowering",
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":MipsGenMCPseudoLowering",
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":MipsGenPostLegalizeGICombiner",
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":MipsGenRegisterBank",
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":MipsGenRegisterBank",
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"MCTargetDesc",
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"MCTargetDesc",
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"TargetInfo",
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"TargetInfo",
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@ -88,6 +98,7 @@ static_library("LLVMMipsCodeGen") {
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"MipsMulMulBugPass.cpp",
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"MipsMulMulBugPass.cpp",
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"MipsOptimizePICCall.cpp",
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"MipsOptimizePICCall.cpp",
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"MipsOs16.cpp",
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"MipsOs16.cpp",
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"MipsPostLegalizerCombiner.cpp",
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"MipsPreLegalizerCombiner.cpp",
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"MipsPreLegalizerCombiner.cpp",
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"MipsRegisterBankInfo.cpp",
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"MipsRegisterBankInfo.cpp",
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"MipsRegisterInfo.cpp",
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"MipsRegisterInfo.cpp",
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