From f0499ba991c4d51e709632c4600da97929341cff Mon Sep 17 00:00:00 2001 From: Manman Ren Date: Mon, 29 Apr 2013 22:58:55 +0000 Subject: [PATCH] TBAA: remove !tbaa from testing cases if not used. This will make it easier to turn on struct-path aware TBAA since the metadata format will change. llvm-svn: 180745 --- .../CodeGen/ARM/2011-12-14-machine-sink.ll | 9 +++------ .../test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll | 18 +++++++----------- .../ARM/2012-01-24-RegSequenceLiveRange.ll | 5 +---- .../CodeGen/ARM/2012-01-26-CopyPropKills.ll | 9 +++------ .../ARM/2012-04-02-TwoAddrInstrCrash.ll | 11 ++++------- llvm/test/CodeGen/ARM/2012-04-10-DAGCombine.ll | 5 +---- .../CodeGen/ARM/2012-06-12-SchedMemLatency.ll | 12 ++++-------- .../ARM/2012-08-04-DtripleSpillReload.ll | 8 +++----- llvm/test/CodeGen/ARM/2013-01-21-PR14992.ll | 10 +++------- llvm/test/CodeGen/ARM/commute-movcc.ll | 8 ++------ llvm/test/CodeGen/ARM/ehabi-filters.ll | 6 +----- 11 files changed, 32 insertions(+), 69 deletions(-) diff --git a/llvm/test/CodeGen/ARM/2011-12-14-machine-sink.ll b/llvm/test/CodeGen/ARM/2011-12-14-machine-sink.ll index 1b21f7571d8e..9334bf36d805 100644 --- a/llvm/test/CodeGen/ARM/2011-12-14-machine-sink.ll +++ b/llvm/test/CodeGen/ARM/2011-12-14-machine-sink.ll @@ -15,13 +15,13 @@ for.cond: ; preds = %for.body, %entry for.body: ; preds = %for.cond %v.5 = select i1 undef, i32 undef, i32 0 - %0 = load i8* undef, align 1, !tbaa !0 + %0 = load i8* undef, align 1 %conv88 = zext i8 %0 to i32 %sub89 = sub nsw i32 0, %conv88 %v.8 = select i1 undef, i32 undef, i32 %sub89 - %1 = load i8* null, align 1, !tbaa !0 + %1 = load i8* null, align 1 %conv108 = zext i8 %1 to i32 - %2 = load i8* undef, align 1, !tbaa !0 + %2 = load i8* undef, align 1 %conv110 = zext i8 %2 to i32 %sub111 = sub nsw i32 %conv108, %conv110 %cmp112 = icmp slt i32 %sub111, 0 @@ -44,6 +44,3 @@ if.end299: ; preds = %for.body, %for.cond %s.10 = phi i32 [ %add172, %for.body ], [ 0, %for.cond ] ret i32 %s.10 } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll b/llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll index 926daafbb7f1..0f1c452b8678 100644 --- a/llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll +++ b/llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll @@ -18,7 +18,7 @@ bb3: ; preds = %bb4, %bb2 br i1 %tmp, label %bb4, label %bb67 bb4: ; preds = %bb3 - %tmp5 = load <4 x i32>* undef, align 16, !tbaa !0 + %tmp5 = load <4 x i32>* undef, align 16 %tmp6 = and <4 x i32> %tmp5, %tmp7 = or <4 x i32> %tmp6, %tmp8 = bitcast <4 x i32> %tmp7 to <4 x float> @@ -41,9 +41,9 @@ bb4: ; preds = %bb3 %tmp24 = trunc i128 %tmp23 to i64 %tmp25 = insertvalue [2 x i64] undef, i64 %tmp24, 0 %tmp26 = insertvalue [2 x i64] %tmp25, i64 0, 1 - %tmp27 = load float* undef, align 4, !tbaa !2 + %tmp27 = load float* undef, align 4 %tmp28 = insertelement <4 x float> undef, float %tmp27, i32 3 - %tmp29 = load <4 x i32>* undef, align 16, !tbaa !0 + %tmp29 = load <4 x i32>* undef, align 16 %tmp30 = and <4 x i32> %tmp29, %tmp31 = or <4 x i32> %tmp30, %tmp32 = bitcast <4 x i32> %tmp31 to <4 x float> @@ -52,10 +52,10 @@ bb4: ; preds = %bb3 %tmp35 = fmul <4 x float> %tmp34, undef %tmp36 = fmul <4 x float> %tmp35, undef %tmp37 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind - %tmp38 = load float* undef, align 4, !tbaa !2 + %tmp38 = load float* undef, align 4 %tmp39 = insertelement <2 x float> undef, float %tmp38, i32 0 %tmp40 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind - %tmp41 = load float* undef, align 4, !tbaa !2 + %tmp41 = load float* undef, align 4 %tmp42 = insertelement <4 x float> undef, float %tmp41, i32 3 %tmp43 = shufflevector <2 x float> %tmp39, <2 x float> undef, <4 x i32> zeroinitializer %tmp44 = fmul <4 x float> %tmp33, %tmp43 @@ -64,10 +64,10 @@ bb4: ; preds = %bb3 %tmp47 = fmul <4 x float> %tmp46, %tmp36 %tmp48 = fadd <4 x float> undef, %tmp47 %tmp49 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind - %tmp50 = load float* undef, align 4, !tbaa !2 + %tmp50 = load float* undef, align 4 %tmp51 = insertelement <4 x float> undef, float %tmp50, i32 3 %tmp52 = call arm_aapcs_vfpcc float* null(i8* undef) nounwind - %tmp54 = load float* %tmp52, align 4, !tbaa !2 + %tmp54 = load float* %tmp52, align 4 %tmp55 = insertelement <4 x float> undef, float %tmp54, i32 3 %tmp56 = fsub <4 x float> , %tmp22 %tmp57 = call <4 x float> @llvm.arm.neon.vmins.v4f32(<4 x float> %tmp56, <4 x float> %tmp55) nounwind @@ -99,7 +99,3 @@ declare <4 x float> @llvm.arm.neon.vmins.v4f32(<4 x float>, <4 x float>) nounwin declare <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float>, <4 x float>) nounwind readnone declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} -!2 = metadata !{metadata !"float", metadata !0} diff --git a/llvm/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll b/llvm/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll index f1c85f1b41f5..61623ec1b6a4 100644 --- a/llvm/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll +++ b/llvm/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll @@ -7,7 +7,7 @@ target triple = "armv7-none-linux-eabi" ; This test case is exercising REG_SEQUENCE, and chains of REG_SEQUENCE. define arm_aapcs_vfpcc void @foo(i8* nocapture %arg, i8* %arg1) nounwind align 2 { bb: - %tmp = load <2 x float>* undef, align 8, !tbaa !0 + %tmp = load <2 x float>* undef, align 8 %tmp2 = extractelement <2 x float> %tmp, i32 0 %tmp3 = insertelement <4 x float> undef, float %tmp2, i32 0 %tmp4 = insertelement <4 x float> %tmp3, float 0.000000e+00, i32 1 @@ -70,6 +70,3 @@ entry: declare arm_aapcs_vfpcc void @bar(i8*, float, float, float) declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll b/llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll index 5f24e427c229..a9e2ebb7fe12 100644 --- a/llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll +++ b/llvm/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll @@ -56,9 +56,9 @@ bb3: ; preds = %bb2 %tmp39 = shufflevector <2 x i64> %tmp38, <2 x i64> undef, <1 x i32> zeroinitializer %tmp40 = bitcast <1 x i64> %tmp39 to <2 x float> %tmp41 = shufflevector <2 x float> %tmp40, <2 x float> undef, <4 x i32> - %tmp42 = load <4 x float>* null, align 16, !tbaa !0 + %tmp42 = load <4 x float>* null, align 16 %tmp43 = fmul <4 x float> %tmp42, %tmp41 - %tmp44 = load <4 x float>* undef, align 16, !tbaa !0 + %tmp44 = load <4 x float>* undef, align 16 %tmp45 = fadd <4 x float> undef, %tmp43 %tmp46 = fadd <4 x float> undef, %tmp45 %tmp47 = bitcast <4 x float> %tmp36 to <2 x i64> @@ -108,7 +108,7 @@ bb3: ; preds = %bb2 %tmp89 = fmul <4 x float> undef, %tmp88 %tmp90 = fadd <4 x float> %tmp89, undef %tmp91 = fadd <4 x float> undef, %tmp90 - store <4 x float> %tmp91, <4 x float>* undef, align 16, !tbaa !0 + store <4 x float> %tmp91, <4 x float>* undef, align 16 unreachable bb92: ; preds = %bb2 @@ -116,6 +116,3 @@ bb92: ; preds = %bb2 } declare arm_aapcs_vfpcc void @bar(i8* noalias nocapture sret, [8 x i64]) nounwind uwtable inlinehint - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/llvm/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll b/llvm/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll index 33ad187926bf..0843fdc4e75e 100644 --- a/llvm/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll +++ b/llvm/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll @@ -9,16 +9,13 @@ define arm_aapcs_vfpcc void @foo() nounwind align 2 { ;