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Fix minor mips16 issues in directives for function prologue. Probably this does 

not matter but makes it more gcc compatible which avoids possible subtle
problems. Also, turned back on a disabled check in helloworld.ll. 

llvm-svn: 175237
This commit is contained in:
Reed Kotler 2013-02-15 01:04:38 +00:00
parent fa1d248ccf
commit f022147790
2 changed files with 30 additions and 11 deletions
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5
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -236,11 +236,12 @@ void MipsAsmPrinter::EmitFunctionBodyStart() {
raw_svector_ostream OS(Str);
printSavedRegsBitmask(OS);
OutStreamer.EmitRawText(OS.str());
if (!Subtarget->inMips16Mode()) {
OutStreamer.EmitRawText(StringRef("\t.set\tnoreorder"));
OutStreamer.EmitRawText(StringRef("\t.set\tnomacro"));
OutStreamer.EmitRawText(StringRef("\t.set\tnoat"));
}
}
}
/// EmitFunctionBodyEnd - Targets can override this to emit stuff after
@ -250,9 +251,11 @@ void MipsAsmPrinter::EmitFunctionBodyEnd() {
// always be at the function end, and we can't emit and
// break with BB logic.
if (OutStreamer.hasRawTextSupport()) {
if (!Subtarget->inMips16Mode()) {
OutStreamer.EmitRawText(StringRef("\t.set\tat"));
OutStreamer.EmitRawText(StringRef("\t.set\tmacro"));
OutStreamer.EmitRawText(StringRef("\t.set\treorder"));
}
OutStreamer.EmitRawText("\t.end\t" + Twine(CurrentFnSym->getName()));
}
}

24
llvm/test/CodeGen/Mips/helloworld.ll
View File

@ -4,8 +4,8 @@
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s | FileCheck %s -check-prefix=ST1
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s | FileCheck %s -check-prefix=ST2
;
; re-enable this when mips16's jalr is fixed.
; DISABLED: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR
; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR
; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR32
@.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00", align 1
@ -17,7 +17,15 @@ entry:
; SR: .set mips16 # @main
; SR: save $ra, [[FS:[0-9]+]]
; SR32: .set nomips16
; SR32: .ent main
; SR-NOT: .set noreorder
; SR-NOT: .set nomacro
; SR-NOT: .set noat
; SR32: .set noreorder
; SR32: .set nomacro
; SR32: .set noat
; SR: save $ra, $s0, $s1, [[FS:[0-9]+]]
; PE: li $[[T1:[0-9]+]], %hi(_gp_disp)
; PE: addiu $[[T2:[0-9]+]], $pc, %lo(_gp_disp)
; PE: sll $[[T3:[0-9]+]], $[[T1]], 16
@ -27,7 +35,7 @@ entry:
; C2: move $25, ${{[0-9]+}}
; C1: move $gp, ${{[0-9]+}}
; C1: jalrc ${{[0-9]+}}
; SR: restore $ra, [[FS]]
; SR: restore $ra, $s0, $s1, [[FS]]
; PE: li $2, 0
; PE: jrc $ra
@ -38,4 +46,12 @@ entry:
; ST2: jal printf
}
; SR-NOT: .set at
; SR-NOT: .set macro
; SR-NOT: .set reorder
; SR32: .set at
; SR32: .set macro
; SR32: .set reorder
; SR: .end main
; SR32: .end main
declare i32 @printf(i8*, ...)