forked from OSchip/llvm-project
[SimplifyCFG] Fix inconsistency in block size assessment for threading
Sometimes SimplifyCFG may decide to perform jump threading. In order to do it, it follows the following algorithm: 1. Checks if the block is small enough for threading; 2. If yes, inserts a PR Phi relying that the next iteration will remove it by performing jump threading; 3. The next iteration checks the block again and performs the threading. This logic has a corner case: inserting the PR Phi increases block's size by 1. If the block size at first check was max possible, one more Phi will exceed this size, and we will neither perform threading nor remove the created Phi node. As result, we will end up with worse IR than before. This patch fixes this situation by excluding Phis from block size computation. Excluding Phis from size computation for threading also makes sense by itself because in case of threadign all those Phis will be removed. Differential Revision: https://reviews.llvm.org/D81835 Reviewed By: asbirlea, nikic
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11cd977017
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f01d9e6fc3
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@ -133,6 +133,11 @@ static cl::opt<unsigned> MaxSpeculationDepth(
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cl::desc("Limit maximum recursion depth when calculating costs of "
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"speculatively executed instructions"));
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static cl::opt<int>
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MaxSmallBlockSize("simplifycfg-max-small-block-size", cl::Hidden, cl::init(10),
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cl::desc("Max size of a block which is still considered "
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"small enough to thread through"));
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STATISTIC(NumBitMaps, "Number of switch instructions turned into bitmaps");
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STATISTIC(NumLinearMaps,
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"Number of switch instructions turned into linear mapping");
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@ -2189,12 +2194,15 @@ bool SimplifyCFGOpt::SpeculativelyExecuteBB(BranchInst *BI, BasicBlock *ThenBB,
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/// Return true if we can thread a branch across this block.
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static bool BlockIsSimpleEnoughToThreadThrough(BasicBlock *BB) {
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unsigned Size = 0;
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int Size = 0;
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for (Instruction &I : BB->instructionsWithoutDebug()) {
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if (Size > 10)
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if (Size > MaxSmallBlockSize)
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return false; // Don't clone large BB's.
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++Size;
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// We will delete Phis while threading, so Phis should not be accounted in
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// block's size
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if (!isa<PHINode>(I))
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++Size;
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// We can only support instructions that do not define values that are
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// live outside of the current basic block.
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@ -1,6 +1,6 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -simplifycfg -S < %s | FileCheck %s
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; RUN: opt -passes=simplify-cfg -S < %s | FileCheck %s
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; RUN: opt -simplifycfg -simplifycfg-max-small-block-size=10 -S < %s | FileCheck %s
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; RUN: opt -passes=simplify-cfg -simplifycfg-max-small-block-size=10 -S < %s | FileCheck %s
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target datalayout = "e-p:64:64-p5:32:32-A5"
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@ -50,15 +50,13 @@ false2: ; preds = %true1
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ret void
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}
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; FIXME: SimplifyCFG is doing something weird here. It should have split the
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; blocks like in the test above, but instead it creates .pr Phi node which
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; only complicates things.
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; Corner case: the block has max possible size for which we still do PRE.
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define void @test_02(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
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; CHECK-LABEL: @test_02(
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; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE1:%.*]], label [[FALSE1:%.*]]
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; CHECK: true1:
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; CHECK-NEXT: [[C_PR:%.*]] = phi i1 [ [[C]], [[FALSE1]] ], [ true, [[TMP0:%.*]] ]
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; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR:%.*]] to i64
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; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE2_CRITEDGE:%.*]], label [[FALSE1:%.*]]
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; CHECK: false1:
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; CHECK-NEXT: store volatile i64 1, i64* [[PTR:%.*]], align 4
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; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR]] to i64
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; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 7
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; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
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@ -68,16 +66,21 @@ define void @test_02(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: br i1 [[C_PR]], label [[TRUE2:%.*]], label [[FALSE2:%.*]]
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; CHECK: false1:
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; CHECK-NEXT: store volatile i64 1, i64* [[PTR]], align 4
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; CHECK-NEXT: br label [[TRUE1]]
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; CHECK: true2:
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; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; CHECK-NEXT: ret void
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; CHECK: false2:
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; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
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; CHECK-NEXT: ret void
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; CHECK: true2.critedge:
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; CHECK-NEXT: [[PTRINT_C:%.*]] = ptrtoint i64* [[PTR]] to i64
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; CHECK-NEXT: [[MASKEDPTR_C:%.*]] = and i64 [[PTRINT_C]], 7
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; CHECK-NEXT: [[MASKCOND_C:%.*]] = icmp eq i64 [[MASKEDPTR_C]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND_C]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; CHECK-NEXT: ret void
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;
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br i1 %c, label %true1, label %false1
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@ -106,3 +109,59 @@ false2: ; preds = %true1
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store volatile i64 3, i64* %ptr, align 8
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ret void
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}
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; This block is too huge for PRE.
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define void @test_03(i1 %c, i64* align 1 %ptr) local_unnamed_addr #0 {
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; CHECK-LABEL: @test_03(
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; CHECK-NEXT: br i1 [[C:%.*]], label [[TRUE1:%.*]], label [[FALSE1:%.*]]
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; CHECK: true1:
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; CHECK-NEXT: [[PTRINT:%.*]] = ptrtoint i64* [[PTR:%.*]] to i64
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; CHECK-NEXT: [[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 7
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; CHECK-NEXT: [[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
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; CHECK-NEXT: tail call void @llvm.assume(i1 [[MASKCOND]])
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; CHECK-NEXT: store volatile i64 0, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: store volatile i64 -1, i64* [[PTR]], align 8
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; CHECK-NEXT: br i1 [[C]], label [[TRUE2:%.*]], label [[FALSE2:%.*]]
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; CHECK: false1:
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; CHECK-NEXT: store volatile i64 1, i64* [[PTR]], align 4
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; CHECK-NEXT: br label [[TRUE1]]
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; CHECK: true2:
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; CHECK-NEXT: store volatile i64 2, i64* [[PTR]], align 8
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; CHECK-NEXT: ret void
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; CHECK: false2:
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; CHECK-NEXT: store volatile i64 3, i64* [[PTR]], align 8
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; CHECK-NEXT: ret void
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;
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br i1 %c, label %true1, label %false1
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true1: ; preds = %false1, %0
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%ptrint = ptrtoint i64* %ptr to i64
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%maskedptr = and i64 %ptrint, 7
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%maskcond = icmp eq i64 %maskedptr, 0
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tail call void @llvm.assume(i1 %maskcond)
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store volatile i64 0, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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store volatile i64 -1, i64* %ptr, align 8
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br i1 %c, label %true2, label %false2
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false1: ; preds = %0
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store volatile i64 1, i64* %ptr, align 4
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br label %true1
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true2: ; preds = %true1
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store volatile i64 2, i64* %ptr, align 8
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ret void
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false2: ; preds = %true1
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store volatile i64 3, i64* %ptr, align 8
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ret void
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}
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