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[InstCombine][X86] simplifyX86immShift - remove ConstantAggregateZero handling. NFC. 

The llvm::computeKnownBits path now handles this.
This commit is contained in:
Simon Pilgrim 2020-03-20 16:44:29 +00:00
parent 770df90451
commit f00a4b531a
1 changed files with 13 additions and 17 deletions
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30
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
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@ -425,27 +425,23 @@ static Value *simplifyX86immShift(const IntrinsicInst &II,
}
// Simplify if count is constant vector.
auto CAZ = dyn_cast<ConstantAggregateZero>(Amt);
auto CDV = dyn_cast<ConstantDataVector>(Amt);
if (!CAZ && !CDV)
if (!CDV)
return nullptr;
APInt Count(64, 0);
if (CDV) {
// SSE2/AVX2 uses all the first 64-bits of the 128-bit vector
// operand to compute the shift amount.
auto VT = cast<VectorType>(CDV->getType());
unsigned BitWidth = VT->getElementType()->getPrimitiveSizeInBits();
assert((64 % BitWidth) == 0 && "Unexpected packed shift size");
unsigned NumSubElts = 64 / BitWidth;
// SSE2/AVX2 uses all the first 64-bits of the 128-bit vector
// operand to compute the shift amount.
assert(AmtVT->isVectorTy() && AmtVT->getPrimitiveSizeInBits() == 128 &&
cast<VectorType>(AmtVT)->getElementType() == SVT &&
"Unexpected shift-by-scalar type");
// Concatenate the sub-elements to create the 64-bit value.
for (unsigned i = 0; i != NumSubElts; ++i) {
unsigned SubEltIdx = (NumSubElts - 1) - i;
auto SubElt = cast<ConstantInt>(CDV->getElementAsConstant(SubEltIdx));
Count <<= BitWidth;
Count |= SubElt->getValue().zextOrTrunc(64);
}
// Concatenate the sub-elements to create the 64-bit value.
APInt Count(64, 0);
for (unsigned i = 0, NumSubElts = 64 / BitWidth; i != NumSubElts; ++i) {
unsigned SubEltIdx = (NumSubElts - 1) - i;
auto SubElt = cast<ConstantInt>(CDV->getElementAsConstant(SubEltIdx));
Count <<= BitWidth;
Count |= SubElt->getValue().zextOrTrunc(64);
}
// If shift-by-zero then just return the original value.