forked from OSchip/llvm-project
[AMDGPU] set read_only access qualifier for pointers
If a kernel's pointer argument is known to be readonly set access qualifier accordingly. This allows RT not to flush caches before dispatches. Differential Revision: https://reviews.llvm.org/D32091 llvm-svn: 300362
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@ -478,9 +478,14 @@ void MetadataStreamer::emitKernelArg(const Argument &Arg) {
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BaseTypeName = cast<MDString>(Node->getOperand(ArgNo))->getString();
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StringRef AccQual;
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Node = Func->getMetadata("kernel_arg_access_qual");
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if (Node && ArgNo < Node->getNumOperands())
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AccQual = cast<MDString>(Node->getOperand(ArgNo))->getString();
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if (Arg.getType()->isPointerTy() && Arg.onlyReadsMemory() &&
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Arg.hasNoAliasAttr()) {
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AccQual = "read_only";
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} else {
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Node = Func->getMetadata("kernel_arg_access_qual");
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if (Node && ArgNo < Node->getNumOperands())
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AccQual = cast<MDString>(Node->getOperand(ArgNo))->getString();
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}
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StringRef Name;
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Node = Func->getMetadata("kernel_arg_name");
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@ -0,0 +1,33 @@
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -filetype=obj -o - < %s | llvm-readobj -amdgpu-code-object-metadata -elf-output-style=GNU -notes | FileCheck %s
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; CHECK: - Name: test_ro_arg
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; CHECK: Args:
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; CHECK-NEXT: - Size: 8
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; CHECK-NEXT: Align: 8
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; CHECK-NEXT: ValueKind: GlobalBuffer
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; CHECK-NEXT: ValueType: F32
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; CHECK-NEXT: AccQual: ReadOnly
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; CHECK-NEXT: AddrSpaceQual: Global
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; CHECK-NEXT: IsConst: true
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; CHECK-NEXT: IsRestrict: true
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; CHECK-NEXT: TypeName: 'float*'
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; CHECK-NEXT: - Size: 8
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; CHECK-NEXT: Align: 8
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; CHECK-NEXT: ValueKind: GlobalBuffer
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; CHECK-NEXT: ValueType: F32
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; CHECK-NEXT: AccQual: Default
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; CHECK-NEXT: AddrSpaceQual: Global
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; CHECK-NEXT: TypeName: 'float*'
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define amdgpu_kernel void @test_ro_arg(float addrspace(1)* noalias readonly %in, float addrspace(1)* %out)
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!kernel_arg_addr_space !0 !kernel_arg_access_qual !1 !kernel_arg_type !2
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!kernel_arg_base_type !2 !kernel_arg_type_qual !3 {
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ret void
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}
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!0 = !{i32 1, i32 1}
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!1 = !{!"none", !"none"}
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!2 = !{!"float*", !"float*"}
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!3 = !{!"const restrict", !""}
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