forked from OSchip/llvm-project
[MachineLICM] Small cleanup: Constify and rangeify.
NFC. llvm-svn: 234018
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@ -214,7 +214,8 @@ namespace {
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/// CanCauseHighRegPressure - Visit BBs from header to current BB,
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/// check if hoisting an instruction of the given cost matrix can cause high
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/// register pressure.
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bool CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost, bool Cheap);
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bool CanCauseHighRegPressure(const DenseMap<unsigned, int> &Cost,
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bool Cheap);
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/// UpdateBackTraceRegPressure - Traverse the back trace from header to
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/// the current block and update their register pressures to reflect the
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@ -1125,27 +1126,23 @@ bool MachineLICM::IsCheapInstruction(MachineInstr &MI) const {
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/// CanCauseHighRegPressure - Visit BBs from header to current BB, check
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/// if hoisting an instruction of the given cost matrix can cause high
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/// register pressure.
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bool MachineLICM::CanCauseHighRegPressure(DenseMap<unsigned, int> &Cost,
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bool MachineLICM::CanCauseHighRegPressure(const DenseMap<unsigned, int>& Cost,
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bool CheapInstr) {
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for (DenseMap<unsigned, int>::iterator CI = Cost.begin(), CE = Cost.end();
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CI != CE; ++CI) {
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if (CI->second <= 0)
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for (const auto &ClassAndCost : Cost) {
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if (ClassAndCost.second <= 0)
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continue;
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unsigned RCId = CI->first;
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unsigned Limit = RegLimit[RCId];
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int Cost = CI->second;
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unsigned Class = ClassAndCost.first;
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int Limit = RegLimit[Class];
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// Don't hoist cheap instructions if they would increase register pressure,
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// even if we're under the limit.
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if (CheapInstr && !HoistCheapInsts)
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return true;
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for (unsigned i = BackTrace.size(); i != 0; --i) {
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SmallVectorImpl<unsigned> &RP = BackTrace[i-1];
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if (RP[RCId] + Cost >= Limit)
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for (const auto &RP : BackTrace)
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if (static_cast<int>(RP[Class]) + ClassAndCost.second >= Limit)
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return true;
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}
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}
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return false;
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