From efd14a62a3cd07861e0810ed04bb28b8bae2c25d Mon Sep 17 00:00:00 2001
From: Chandler Carruth <chandlerc@gmail.com>
Date: Mon, 21 Jul 2014 09:23:21 +0000
Subject: [PATCH] FileCheck-ize a test.

llvm-svn: 213508
---
 llvm/test/CodeGen/X86/vec_extract-sse4.ll | 30 +++++++++++++++++++----
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/llvm/test/CodeGen/X86/vec_extract-sse4.ll b/llvm/test/CodeGen/X86/vec_extract-sse4.ll
index 3cb519adf4f8..747c8a8e8d02 100644
--- a/llvm/test/CodeGen/X86/vec_extract-sse4.ll
+++ b/llvm/test/CodeGen/X86/vec_extract-sse4.ll
@@ -1,10 +1,13 @@
-; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse4.1 -o %t
-; RUN: not grep extractps   %t
-; RUN: not grep pextrd      %t
-; RUN: not grep pshufd  %t
-; RUN: not grep movss   %t
+; RUN: llc < %s -mcpu=corei7 -march=x86 -mattr=+sse4.1 | FileCheck %s
 
 define void @t1(float* %R, <4 x float>* %P1) nounwind {
+; CHECK-LABEL: @t1
+; CHECK:         movl 4(%esp), %[[R0:e[abcd]x]]
+; CHECK-NEXT:    movl 8(%esp), %[[R1:e[abcd]x]]
+; CHECK-NEXT:    movl 12(%[[R1]]), %[[R2:e[abcd]x]]
+; CHECK-NEXT:    movl %[[R2]], (%[[R0]])
+; CHECK-NEXT:    retl
+
 	%X = load <4 x float>* %P1
 	%tmp = extractelement <4 x float> %X, i32 3
 	store float %tmp, float* %R
@@ -12,12 +15,24 @@ define void @t1(float* %R, <4 x float>* %P1) nounwind {
 }
 
 define float @t2(<4 x float>* %P1) nounwind {
+; CHECK-LABEL: @t2
+; CHECK:         movl 4(%esp), %[[R0:e[abcd]x]]
+; CHECK-NEXT:    flds 8(%[[R0]])
+; CHECK-NEXT:    retl
+
 	%X = load <4 x float>* %P1
 	%tmp = extractelement <4 x float> %X, i32 2
 	ret float %tmp
 }
 
 define void @t3(i32* %R, <4 x i32>* %P1) nounwind {
+; CHECK-LABEL: @t3
+; CHECK:         movl 4(%esp), %[[R0:e[abcd]x]]
+; CHECK-NEXT:    movl 8(%esp), %[[R1:e[abcd]x]]
+; CHECK-NEXT:    movl 12(%[[R1]]), %[[R2:e[abcd]x]]
+; CHECK-NEXT:    movl %[[R2]], (%[[R0]])
+; CHECK-NEXT:    retl
+
 	%X = load <4 x i32>* %P1
 	%tmp = extractelement <4 x i32> %X, i32 3
 	store i32 %tmp, i32* %R
@@ -25,6 +40,11 @@ define void @t3(i32* %R, <4 x i32>* %P1) nounwind {
 }
 
 define i32 @t4(<4 x i32>* %P1) nounwind {
+; CHECK-LABEL: @t4
+; CHECK:         movl 4(%esp), %[[R0:e[abcd]x]]
+; CHECK-NEXT:    movl 12(%[[R0]]), %eax
+; CHECK-NEXT:    retl
+
 	%X = load <4 x i32>* %P1
 	%tmp = extractelement <4 x i32> %X, i32 3
 	ret i32 %tmp