From efc70058d90df2e3266def2f9f6919569304aa30 Mon Sep 17 00:00:00 2001
From: Weining Lu <luweining@loongson.cn>
Date: Mon, 20 Jun 2022 09:44:38 +0800
Subject: [PATCH] [LoongArch] Add codegen support for fneg

Reference:
https://llvm.org/docs/LangRef.html#fneg-instruction

Differential Revision: https://reviews.llvm.org/D127200
---
 .../LoongArch/LoongArchFloat32InstrInfo.td    |  3 ++
 .../LoongArch/LoongArchFloat64InstrInfo.td    |  1 +
 .../CodeGen/LoongArch/ir-instruction/fneg.ll  | 32 +++++++++++++++++++
 .../CodeGen/LoongArch/ir-instruction/fsub.ll  | 28 ++++++++++++++++
 4 files changed, 64 insertions(+)
 create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/fneg.ll

diff --git a/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
index d7b8e7f54a83..f988b637a51a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
@@ -113,6 +113,8 @@ def FSTLE_S : FP_STORE_3R<0b00111000011101110, "fstle.s", FPR32>;
 
 /// Generic pattern classes
 
+class PatFpr<SDPatternOperator OpNode, LAInst Inst, RegisterClass RegTy>
+    : Pat<(OpNode RegTy:$fj), (Inst $fj)>;
 class PatFprFpr<SDPatternOperator OpNode, LAInst Inst, RegisterClass RegTy>
     : Pat<(OpNode RegTy:$fj, RegTy:$fk), (Inst $fj, $fk)>;
 
@@ -124,5 +126,6 @@ def : PatFprFpr<fadd, FADD_S, FPR32>;
 def : PatFprFpr<fsub, FSUB_S, FPR32>;
 def : PatFprFpr<fmul, FMUL_S, FPR32>;
 def : PatFprFpr<fdiv, FDIV_S, FPR32>;
+def : PatFpr<fneg, FNEG_S, FPR32>;
 
 } // Predicates = [HasBasicF]
diff --git a/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
index 4ad3f6e35ee7..d98272f67a4b 100644
--- a/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
@@ -143,5 +143,6 @@ def : PatFprFpr<fadd, FADD_D, FPR64>;
 def : PatFprFpr<fsub, FSUB_D, FPR64>;
 def : PatFprFpr<fmul, FMUL_D, FPR64>;
 def : PatFprFpr<fdiv, FDIV_D, FPR64>;
+def : PatFpr<fneg, FNEG_D, FPR64>;
 
 } // Predicates = [HasBasicD]
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/fneg.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/fneg.ll
new file mode 100644
index 000000000000..3a8a4127d8e7
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/fneg.ll
@@ -0,0 +1,32 @@
+; RUN: llc --mtriple=loongarch32 --mattr=+d < %s | FileCheck %s --check-prefix=LA32
+; RUN: llc --mtriple=loongarch64 --mattr=+d < %s | FileCheck %s --check-prefix=LA64
+
+;; Exercise the 'fneg' LLVM IR: https://llvm.org/docs/LangRef.html#fneg-instruction
+
+define float @fneg_s(float %x) {
+; LA32-LABEL: fneg_s:
+; LA32:       # %bb.0:
+; LA32-NEXT:    fneg.s $fa0, $fa0
+; LA32-NEXT:    jirl $zero, $ra, 0
+;
+; LA64-LABEL: fneg_s:
+; LA64:       # %bb.0:
+; LA64-NEXT:    fneg.s $fa0, $fa0
+; LA64-NEXT:    jirl $zero, $ra, 0
+  %neg = fneg float %x
+  ret float %neg
+}
+
+define double @fneg_d(double %x) {
+; LA32-LABEL: fneg_d:
+; LA32:       # %bb.0:
+; LA32-NEXT:    fneg.d $fa0, $fa0
+; LA32-NEXT:    jirl $zero, $ra, 0
+;
+; LA64-LABEL: fneg_d:
+; LA64:       # %bb.0:
+; LA64-NEXT:    fneg.d $fa0, $fa0
+; LA64-NEXT:    jirl $zero, $ra, 0
+  %neg = fneg double %x
+  ret double %neg
+}
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/fsub.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/fsub.ll
index 9e7d7964ef05..9ddf583d999c 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/fsub.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/fsub.ll
@@ -30,3 +30,31 @@ define double @fsub_d(double %x, double %y) {
   %sub = fsub double %x, %y
   ret double %sub
 }
+
+define float @fneg_s(float %x) {
+; LA32-LABEL: fneg_s:
+; LA32:       # %bb.0:
+; LA32-NEXT:    fneg.s $fa0, $fa0
+; LA32-NEXT:    jirl $zero, $ra, 0
+;
+; LA64-LABEL: fneg_s:
+; LA64:       # %bb.0:
+; LA64-NEXT:    fneg.s $fa0, $fa0
+; LA64-NEXT:    jirl $zero, $ra, 0
+    %res = fsub float -0.0, %x
+    ret float %res
+}
+
+define double @fneg_d(double %x) {
+; LA32-LABEL: fneg_d:
+; LA32:       # %bb.0:
+; LA32-NEXT:    fneg.d $fa0, $fa0
+; LA32-NEXT:    jirl $zero, $ra, 0
+;
+; LA64-LABEL: fneg_d:
+; LA64:       # %bb.0:
+; LA64-NEXT:    fneg.d $fa0, $fa0
+; LA64-NEXT:    jirl $zero, $ra, 0
+    %res = fsub double -0.0, %x
+    ret double %res
+}