forked from OSchip/llvm-project
Improve C11 atomics support:
- Generate atomicrmw operations in most of the cases when it's sensible to do so. - Don't crash in several common cases (and hopefully don't crash in more of them). - Add some better tests. We now generate significantly better code for things like: _Atomic(int) x; ... x++; On MIPS, this now generates a 4-instruction ll/sc loop, where previously it generated about 30 instructions in two nested loops. On x86-64, we generate a single lock incl, instead of a lock cmpxchgl loop (one instruction instead of ten). llvm-svn: 176420
This commit is contained in:
David Chisnall
parent
e0a5c0d914
commit
ef78c305fa
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@ -1444,21 +1444,60 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV,
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bool isInc, bool isPre) {
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QualType type = E->getSubExpr()->getType();
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llvm::Value *value = EmitLoadOfLValue(LV);
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llvm::Value *input = value;
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llvm::PHINode *atomicPHI = 0;
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llvm::Value *value;
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llvm::Value *input;
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int amount = (isInc ? 1 : -1);
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if (const AtomicType *atomicTy = type->getAs<AtomicType>()) {
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type = atomicTy->getValueType();
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if (isInc && type->isBooleanType()) {
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llvm::Value *True = CGF.EmitToMemory(Builder.getTrue(), type);
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if (isPre) {
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Builder.Insert(new llvm::StoreInst(True,
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LV.getAddress(), LV.isVolatileQualified(),
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LV.getAlignment().getQuantity(),
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llvm::SequentiallyConsistent));
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return Builder.getTrue();
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}
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// For atomic bool increment, we just store true and return it for
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// preincrement, do an atomic swap with true for postincrement
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return Builder.CreateAtomicRMW(llvm::AtomicRMWInst::Xchg,
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LV.getAddress(), True, llvm::SequentiallyConsistent);
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}
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// Special case for atomic increment / decrement on integers, emit
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// atomicrmw instructions. We skip this if we want to be doing overflow
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// checking, and fall into the slow path with the atomic cmpxchg loop.
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if (!type->isBooleanType() && type->isIntegerType() &&
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!(type->isUnsignedIntegerType() &&
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CGF.SanOpts->UnsignedIntegerOverflow) &&
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CGF.getLangOpts().getSignedOverflowBehavior() !=
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LangOptions::SOB_Trapping) {
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llvm::AtomicRMWInst::BinOp aop = isInc ? llvm::AtomicRMWInst::Add :
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llvm::AtomicRMWInst::Sub;
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llvm::Instruction::BinaryOps op = isInc ? llvm::Instruction::Add :
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llvm::Instruction::Sub;
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llvm::Value *amt = CGF.EmitToMemory(
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llvm::ConstantInt::get(ConvertType(type), 1, true), type);
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llvm::Value *old = Builder.CreateAtomicRMW(aop,
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LV.getAddress(), amt, llvm::SequentiallyConsistent);
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return isPre ? Builder.CreateBinOp(op, old, amt) : old;
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}
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value = EmitLoadOfLValue(LV);
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input = value;
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// For every other atomic operation, we need to emit a load-op-cmpxchg loop
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llvm::BasicBlock *startBB = Builder.GetInsertBlock();
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llvm::BasicBlock *opBB = CGF.createBasicBlock("atomic_op", CGF.CurFn);
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value = CGF.EmitToMemory(value, type);
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Builder.CreateBr(opBB);
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Builder.SetInsertPoint(opBB);
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atomicPHI = Builder.CreatePHI(value->getType(), 2);
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atomicPHI->addIncoming(value, startBB);
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type = atomicTy->getValueType();
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value = atomicPHI;
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} else {
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value = EmitLoadOfLValue(LV);
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input = value;
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}
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// Special case of integer increment that we have to check first: bool++.
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@ -1596,7 +1635,7 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV,
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llvm::BasicBlock *opBB = Builder.GetInsertBlock();
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llvm::BasicBlock *contBB = CGF.createBasicBlock("atomic_cont", CGF.CurFn);
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llvm::Value *old = Builder.CreateAtomicCmpXchg(LV.getAddress(), atomicPHI,
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value, llvm::SequentiallyConsistent);
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CGF.EmitToMemory(value, type), llvm::SequentiallyConsistent);
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atomicPHI->addIncoming(old, opBB);
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llvm::Value *success = Builder.CreateICmpEQ(old, atomicPHI);
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Builder.CreateCondBr(success, contBB, opBB);
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@ -1872,20 +1911,63 @@ LValue ScalarExprEmitter::EmitCompoundAssignLValue(
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OpInfo.E = E;
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// Load/convert the LHS.
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LValue LHSLV = EmitCheckedLValue(E->getLHS(), CodeGenFunction::TCK_Store);
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OpInfo.LHS = EmitLoadOfLValue(LHSLV);
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llvm::PHINode *atomicPHI = 0;
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if (LHSTy->isAtomicType()) {
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if (const AtomicType *atomicTy = LHSTy->getAs<AtomicType>()) {
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QualType type = atomicTy->getValueType();
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if (!type->isBooleanType() && type->isIntegerType() &&
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!(type->isUnsignedIntegerType() &&
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CGF.SanOpts->UnsignedIntegerOverflow) &&
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CGF.getLangOpts().getSignedOverflowBehavior() !=
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LangOptions::SOB_Trapping) {
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llvm::AtomicRMWInst::BinOp aop = llvm::AtomicRMWInst::BAD_BINOP;
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switch (OpInfo.Opcode) {
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// We don't have atomicrmw operands for *, %, /, <<, >>
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case BO_MulAssign: case BO_DivAssign:
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case BO_RemAssign:
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case BO_ShlAssign:
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case BO_ShrAssign:
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break;
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case BO_AddAssign:
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aop = llvm::AtomicRMWInst::Add;
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break;
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case BO_SubAssign:
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aop = llvm::AtomicRMWInst::Sub;
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break;
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case BO_AndAssign:
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aop = llvm::AtomicRMWInst::And;
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break;
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case BO_XorAssign:
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aop = llvm::AtomicRMWInst::Xor;
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break;
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case BO_OrAssign:
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aop = llvm::AtomicRMWInst::Or;
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break;
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default:
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llvm_unreachable("Invalid compound assignment type");
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}
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if (aop != llvm::AtomicRMWInst::BAD_BINOP) {
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llvm::Value *amt = CGF.EmitToMemory(EmitScalarConversion(OpInfo.RHS,
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E->getRHS()->getType(), LHSTy), LHSTy);
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Builder.CreateAtomicRMW(aop, LHSLV.getAddress(), amt,
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llvm::SequentiallyConsistent);
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return LHSLV;
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}
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}
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// FIXME: For floating point types, we should be saving and restoring the
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// floating point environment in the loop.
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llvm::BasicBlock *startBB = Builder.GetInsertBlock();
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llvm::BasicBlock *opBB = CGF.createBasicBlock("atomic_op", CGF.CurFn);
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OpInfo.LHS = EmitLoadOfLValue(LHSLV);
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OpInfo.LHS = CGF.EmitToMemory(OpInfo.LHS, type);
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Builder.CreateBr(opBB);
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Builder.SetInsertPoint(opBB);
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atomicPHI = Builder.CreatePHI(OpInfo.LHS->getType(), 2);
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atomicPHI->addIncoming(OpInfo.LHS, startBB);
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OpInfo.LHS = atomicPHI;
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}
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else
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OpInfo.LHS = EmitLoadOfLValue(LHSLV);
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OpInfo.LHS = EmitScalarConversion(OpInfo.LHS, LHSTy,
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E->getComputationLHSType());
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@ -1900,7 +1982,7 @@ LValue ScalarExprEmitter::EmitCompoundAssignLValue(
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llvm::BasicBlock *opBB = Builder.GetInsertBlock();
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llvm::BasicBlock *contBB = CGF.createBasicBlock("atomic_cont", CGF.CurFn);
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llvm::Value *old = Builder.CreateAtomicCmpXchg(LHSLV.getAddress(), atomicPHI,
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Result, llvm::SequentiallyConsistent);
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CGF.EmitToMemory(Result, LHSTy), llvm::SequentiallyConsistent);
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atomicPHI->addIncoming(old, opBB);
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llvm::Value *success = Builder.CreateICmpEQ(old, atomicPHI);
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Builder.CreateCondBr(success, contBB, opBB);
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@ -15,9 +15,4 @@ void foo(int x)
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// CHECK: sdiv i32
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// CHECK: cmpxchg i16*
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// These should be emitting atomicrmw instructions, but they aren't yet
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i += 2; // CHECK: cmpxchg
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i -= 2; // CHECK: cmpxchg
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i++; // CHECK: cmpxchg
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i--; // CHECK: cmpxchg
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}
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@ -0,0 +1,139 @@
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// RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv7-unknown-freebsd -std=c11 | FileCheck %s
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// Test that we are generating atomicrmw instructions, rather than
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// compare-exchange loops for common atomic ops. This makes a big difference
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// on RISC platforms, where the compare-exchange loop becomes a ll/sc pair for
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// the load and then another ll/sc in the loop, expanding to about 30
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// instructions when it should be only 4. It has a smaller, but still
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// noticeable, impact on platforms like x86 and RISC-V, where there are atomic
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// RMW instructions.
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//
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// We currently emit cmpxchg loops for most operations on _Bools, because
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// they're sufficiently rare that it's not worth making sure that the semantics
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// are correct.
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typedef int __attribute__((vector_size(16))) vector;
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_Atomic(_Bool) b;
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_Atomic(int) i;
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_Atomic(long long) l;
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_Atomic(short) s;
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_Atomic(char*) p;
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_Atomic(float) f;
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_Atomic(vector) v;
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// CHECK-NOT: cmpxchg
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// CHECK: testinc
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void testinc(void)
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{
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// Special case for suffix bool++, sets to true and returns the old value.
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// CHECK: atomicrmw xchg i8* @b, i8 1 seq_cst
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b++;
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// CHECK: atomicrmw add i32* @i, i32 1 seq_cst
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i++;
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// CHECK: atomicrmw add i64* @l, i64 1 seq_cst
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l++;
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// CHECK: atomicrmw add i16* @s, i16 1 seq_cst
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s++;
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// Prefix increment
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// Special case for bool: set to true and return true
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// CHECK: store atomic i8 1, i8* @b seq_cst, align 1
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++b;
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// Currently, we have no variant of atomicrmw that returns the new value, so
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// we have to generate an atomic add, which returns the old value, and then a
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// non-atomic add.
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// CHECK: atomicrmw add i32* @i, i32 1 seq_cst
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// CHECK: add i32
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++i;
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// CHECK: atomicrmw add i64* @l, i64 1 seq_cst
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// CHECK: add i64
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++l;
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// CHECK: atomicrmw add i16* @s, i16 1 seq_cst
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// CHECK: add i16
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++s;
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}
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// CHECK: testdec
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void testdec(void)
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{
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// CHECK: cmpxchg i8* @b
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b--;
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// CHECK: atomicrmw sub i32* @i, i32 1 seq_cst
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i--;
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// CHECK: atomicrmw sub i64* @l, i64 1 seq_cst
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l--;
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// CHECK: atomicrmw sub i16* @s, i16 1 seq_cst
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s--;
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// CHECK: cmpxchg i8* @b
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--b;
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// CHECK: atomicrmw sub i32* @i, i32 1 seq_cst
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// CHECK: sub i32
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--i;
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// CHECK: atomicrmw sub i64* @l, i64 1 seq_cst
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// CHECK: sub i64
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--l;
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// CHECK: atomicrmw sub i16* @s, i16 1 seq_cst
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// CHECK: sub i16
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--s;
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}
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// CHECK: testaddeq
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void testaddeq(void)
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{
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// CHECK: cmpxchg i8* @b
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// CHECK: atomicrmw add i32* @i, i32 42 seq_cst
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// CHECK: atomicrmw add i64* @l, i64 42 seq_cst
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// CHECK: atomicrmw add i16* @s, i16 42 seq_cst
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b += 42;
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i += 42;
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l += 42;
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s += 42;
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}
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// CHECK: testsubeq
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void testsubeq(void)
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{
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// CHECK: cmpxchg i8* @b
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// CHECK: atomicrmw sub i32* @i, i32 42 seq_cst
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// CHECK: atomicrmw sub i64* @l, i64 42 seq_cst
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// CHECK: atomicrmw sub i16* @s, i16 42 seq_cst
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b -= 42;
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i -= 42;
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l -= 42;
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s -= 42;
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}
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// CHECK: testxoreq
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void testxoreq(void)
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{
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// CHECK: cmpxchg i8* @b
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// CHECK: atomicrmw xor i32* @i, i32 42 seq_cst
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// CHECK: atomicrmw xor i64* @l, i64 42 seq_cst
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// CHECK: atomicrmw xor i16* @s, i16 42 seq_cst
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b ^= 42;
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i ^= 42;
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l ^= 42;
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s ^= 42;
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}
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// CHECK: testoreq
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void testoreq(void)
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{
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// CHECK: cmpxchg i8* @b
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// CHECK: atomicrmw or i32* @i, i32 42 seq_cst
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// CHECK: atomicrmw or i64* @l, i64 42 seq_cst
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// CHECK: atomicrmw or i16* @s, i16 42 seq_cst
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b |= 42;
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i |= 42;
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l |= 42;
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s |= 42;
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}
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// CHECK: testandeq
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void testandeq(void)
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{
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// CHECK: cmpxchg i8* @b
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// CHECK: atomicrmw and i32* @i, i32 42 seq_cst
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// CHECK: atomicrmw and i64* @l, i64 42 seq_cst
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// CHECK: atomicrmw and i16* @s, i16 42 seq_cst
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b &= 42;
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i &= 42;
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l &= 42;
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s &= 42;
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}
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