forked from OSchip/llvm-project
[CSKY] Fix some Clang warnings. NFC
Reviewed By: zixuan-wu Differential Revision: https://reviews.llvm.org/D122872
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@ -905,8 +905,7 @@ static inline unsigned getUnconditionalBrDisp(int Opc) {
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Scale = 2;
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break;
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default:
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assert(0);
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break;
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llvm_unreachable("");
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}
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unsigned MaxOffs = ((1 << (Bits - 1)) - 1) * Scale;
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@ -655,7 +655,7 @@ class R_Z_1<bits<6> sop, bits<5> pcode, string op>
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// Format< OP[6] | RZ[5] | 00000[5] | SOP[6] | PCODE[5] | 00000[5] >
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// Instructions:(2) clrf32, clrt32
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class R_Z_2<bits<6> sop, bits<5> pcode, string op, list<dag> pattern>
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class R_Z_2<bits<6> sop, bits<5> pcode, string op>
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: CSKY32Inst<AddrModeNone, 0x31, (outs GPR:$rz),
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(ins CARRY:$ca, GPR:$false), !strconcat(op, "\t$rz"), []> {
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bits<5> rz;
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@ -476,9 +476,6 @@ void CSKYInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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const DebugLoc &DL, MCRegister DestReg,
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MCRegister SrcReg, bool KillSrc) const {
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MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
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if (CSKY::GPRRegClass.contains(SrcReg) &&
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CSKY::CARRYRegClass.contains(DestReg)) {
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if (STI.hasE2()) {
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@ -734,8 +734,8 @@ let Predicates= [iHasE2] in {
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let Predicates = [iHas2E3] in {
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def MVCV32 : R_Z_1<0x1, 0x10, "mvcv32">;
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def CLRF32 : R_Z_2<0xB, 0x1, "clrf32", []>;
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def CLRT32 : R_Z_2<0xB, 0x2, "clrt32", []>;
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def CLRF32 : R_Z_2<0xB, 0x1, "clrf32">;
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def CLRT32 : R_Z_2<0xB, 0x2, "clrt32">;
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}
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//===----------------------------------------------------------------------===//
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@ -1363,4 +1363,4 @@ def CONSTPOOL_ENTRY : CSKYPseudo<(outs),
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include "CSKYInstrInfo16Instr.td"
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include "CSKYInstrInfoF1.td"
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include "CSKYInstrInfoF2.td"
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include "CSKYInstrAlias.td"
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include "CSKYInstrAlias.td"
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@ -18,8 +18,6 @@
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namespace llvm {
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class CSKYMachineFunctionInfo : public MachineFunctionInfo {
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MachineFunction &MF;
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Register GlobalBaseReg = 0;
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bool SpillsCR = false;
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@ -33,7 +31,7 @@ class CSKYMachineFunctionInfo : public MachineFunctionInfo {
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unsigned PICLabelUId = 0;
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public:
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CSKYMachineFunctionInfo(MachineFunction &MF) : MF(MF) {}
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CSKYMachineFunctionInfo(MachineFunction &) {}
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Register getGlobalBaseReg() const { return GlobalBaseReg; }
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void setGlobalBaseReg(Register Reg) { GlobalBaseReg = Reg; }
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@ -33,7 +33,6 @@ typedef MCDisassembler::DecodeStatus DecodeStatus;
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namespace {
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class CSKYDisassembler : public MCDisassembler {
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std::unique_ptr<MCInstrInfo const> const MCII;
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mutable bool inDataRegion = false;
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mutable StringRef symbolName;
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DecodeStatus handleCROperand(MCInst &Instr) const;
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@ -166,6 +165,8 @@ static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo,
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return MCDisassembler::Success;
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}
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// TODO
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LLVM_ATTRIBUTE_UNUSED
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static DecodeStatus DecodesFPR128RegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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@ -196,6 +197,8 @@ static DecodeStatus DecodemGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
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return MCDisassembler::Success;
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}
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// TODO
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LLVM_ATTRIBUTE_UNUSED
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static DecodeStatus DecodeGPRSPRegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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@ -121,6 +121,7 @@ unsigned CSKYELFObjectWriter::getRelocType(MCContext &Ctx,
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return ELF::R_CKCORE_ADDR32;
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}
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}
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return ELF::R_CKCORE_NONE;
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case FK_Data_8:
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Ctx.reportError(Fixup.getLoc(), "8-byte data relocations not supported");
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return ELF::R_CKCORE_NONE;
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@ -137,7 +137,7 @@ public:
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EmitMappingSymbol("$d");
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MCELFStreamer::emitValueImpl(Value, Size, Loc);
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}
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void reset() {
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void reset() override {
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MappingSymbolCounter = 0;
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State = EMS_None;
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MCELFStreamer::reset();
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