diff --git a/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp b/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp index 6ad8b7ad1b52..61a148aea9fe 100644 --- a/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp +++ b/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp @@ -241,7 +241,7 @@ bool Mips16DAGToDAGISel::selectAddr16( /// Select instructions not customized! Used for /// expanded, promoted and normal instructions -std::pair Mips16DAGToDAGISel::selectNode(SDNode *Node) { +bool Mips16DAGToDAGISel::trySelect(SDNode *Node) { unsigned Opcode = Node->getOpcode(); SDLoc DL(Node); @@ -285,9 +285,8 @@ std::pair Mips16DAGToDAGISel::selectNode(SDNode *Node) { SDNode *AddCarry = CurDAG->getMachineNode(Addu_op, DL, VT, SDValue(Carry,0), RHS); - SDNode *Result = CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, - SDValue(AddCarry,0)); - return std::make_pair(true, Result); + CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, SDValue(AddCarry, 0)); + return true; } /// Mul with two results @@ -303,18 +302,19 @@ std::pair Mips16DAGToDAGISel::selectNode(SDNode *Node) { ReplaceUses(SDValue(Node, 1), SDValue(LoHi.second, 0)); CurDAG->RemoveDeadNode(Node); - return std::make_pair(true, nullptr); + return true; } case ISD::MULHS: case ISD::MULHU: { MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16); - SDNode *Result = selectMULT(Node, MultOpc, DL, NodeTy, false, true).second; - return std::make_pair(true, Result); + auto LoHi = selectMULT(Node, MultOpc, DL, NodeTy, false, true); + ReplaceNode(Node, LoHi.second); + return true; } } - return std::make_pair(false, nullptr); + return false; } FunctionPass *llvm::createMips16ISelDag(MipsTargetMachine &TM) { diff --git a/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h b/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h index ae0e61e19d9d..63410c7351cc 100644 --- a/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h +++ b/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h @@ -35,7 +35,7 @@ private: bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, SDValue &Offset, SDValue &Alias) override; - std::pair selectNode(SDNode *Node) override; + bool trySelect(SDNode *Node) override; void processFunctionAfterISel(MachineFunction &MF) override; diff --git a/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp index a5a127ca4699..33e7f49b8aa0 100644 --- a/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp +++ b/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp @@ -182,7 +182,7 @@ bool MipsDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const { /// Select instructions not customized! Used for /// expanded, promoted and normal instructions -SDNode *MipsDAGToDAGISel::SelectImpl(SDNode *Node) { +void MipsDAGToDAGISel::Select(SDNode *Node) { unsigned Opcode = Node->getOpcode(); // Dump information about the Node being selected @@ -192,21 +192,20 @@ SDNode *MipsDAGToDAGISel::SelectImpl(SDNode *Node) { if (Node->isMachineOpcode()) { DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n"); Node->setNodeId(-1); - return nullptr; + return; } // See if subclasses can handle this node. - std::pair Ret = selectNode(Node); - - if (Ret.first) - return Ret.second; + if (trySelect(Node)) + return; switch(Opcode) { default: break; // Get target GOT address. case ISD::GLOBAL_OFFSET_TABLE: - return getGlobalBaseReg(); + ReplaceNode(Node, getGlobalBaseReg()); + return; #ifndef NDEBUG case ISD::LOAD: @@ -220,15 +219,7 @@ SDNode *MipsDAGToDAGISel::SelectImpl(SDNode *Node) { } // Select the default instruction - SDNode *ResNode = SelectCode(Node); - - DEBUG(errs() << "=> "); - if (ResNode == nullptr || ResNode == Node) - DEBUG(Node->dump(CurDAG)); - else - DEBUG(ResNode->dump(CurDAG)); - DEBUG(errs() << "\n"); - return ResNode; + SelectCode(Node); } bool MipsDAGToDAGISel:: diff --git a/llvm/lib/Target/Mips/MipsISelDAGToDAG.h b/llvm/lib/Target/Mips/MipsISelDAGToDAG.h index cfffa36531fb..29e3599b4325 100644 --- a/llvm/lib/Target/Mips/MipsISelDAGToDAG.h +++ b/llvm/lib/Target/Mips/MipsISelDAGToDAG.h @@ -114,9 +114,9 @@ private: /// starting at bit zero. virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const; - SDNode *SelectImpl(SDNode *N) override; + void Select(SDNode *N) override; - virtual std::pair selectNode(SDNode *Node) = 0; + virtual bool trySelect(SDNode *Node) = 0; // getImm - Return a target constant with the specified value. inline SDValue getImm(const SDNode *Node, uint64_t Imm) { diff --git a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp index 5af35487d6cf..7de86413de1e 100644 --- a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp @@ -236,7 +236,7 @@ void MipsSEDAGToDAGISel::processFunctionAfterISel(MachineFunction &MF) { } } -SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag, +void MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, SDLoc DL, SDNode *Node) const { unsigned Opc = InFlag.getOpcode(); (void)Opc; @@ -275,8 +275,7 @@ SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag, if (!C || C->getZExtValue()) AddCarry = CurDAG->getMachineNode(ADDuOp, DL, VT, SDValue(Carry, 0), RHS); - return CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, - SDValue(AddCarry, 0)); + CurDAG->SelectNodeTo(Node, MOp, VT, MVT::Glue, LHS, SDValue(AddCarry, 0)); } /// Match frameindex @@ -706,7 +705,7 @@ bool MipsSEDAGToDAGISel::selectVSplatUimmInvPow2(SDValue N, return false; } -std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { +bool MipsSEDAGToDAGISel::trySelect(SDNode *Node) { unsigned Opcode = Node->getOpcode(); SDLoc DL(Node); @@ -714,16 +713,14 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { // Instruction Selection not handled by the auto-generated // tablegen selection should be handled here. /// - SDNode *Result; - switch(Opcode) { default: break; case ISD::SUBE: { SDValue InFlag = Node->getOperand(2); unsigned Opc = Subtarget->isGP64bit() ? Mips::DSUBu : Mips::SUBu; - Result = selectAddESubE(Opc, InFlag, InFlag.getOperand(0), DL, Node); - return std::make_pair(true, Result); + selectAddESubE(Opc, InFlag, InFlag.getOperand(0), DL, Node); + return true; } case ISD::ADDE: { @@ -731,8 +728,8 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { break; SDValue InFlag = Node->getOperand(2); unsigned Opc = Subtarget->isGP64bit() ? Mips::DADDu : Mips::ADDu; - Result = selectAddESubE(Opc, InFlag, InFlag.getValue(0), DL, Node); - return std::make_pair(true, Result); + selectAddESubE(Opc, InFlag, InFlag.getValue(0), DL, Node); + return true; } case ISD::ConstantFP: { @@ -741,20 +738,20 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { if (Subtarget->isGP64bit()) { SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, Mips::ZERO_64, MVT::i64); - Result = CurDAG->getMachineNode(Mips::DMTC1, DL, MVT::f64, Zero); + ReplaceNode(Node, + CurDAG->getMachineNode(Mips::DMTC1, DL, MVT::f64, Zero)); } else if (Subtarget->isFP64bit()) { SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, Mips::ZERO, MVT::i32); - Result = CurDAG->getMachineNode(Mips::BuildPairF64_64, DL, MVT::f64, - Zero, Zero); + ReplaceNode(Node, CurDAG->getMachineNode(Mips::BuildPairF64_64, DL, + MVT::f64, Zero, Zero)); } else { SDValue Zero = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), DL, Mips::ZERO, MVT::i32); - Result = CurDAG->getMachineNode(Mips::BuildPairF64, DL, MVT::f64, Zero, - Zero); + ReplaceNode(Node, CurDAG->getMachineNode(Mips::BuildPairF64, DL, + MVT::f64, Zero, Zero)); } - - return std::make_pair(true, Result); + return true; } break; } @@ -797,7 +794,8 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { SDValue(RegOpnd, 0), ImmOpnd); } - return std::make_pair(true, RegOpnd); + ReplaceNode(Node, RegOpnd); + return true; } case ISD::INTRINSIC_W_CHAIN: { @@ -810,7 +808,8 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { SDValue RegIdx = Node->getOperand(2); SDValue Reg = CurDAG->getCopyFromReg(ChainIn, DL, getMSACtrlReg(RegIdx), MVT::i32); - return std::make_pair(true, Reg.getNode()); + ReplaceNode(Node, Reg.getNode()); + return true; } } break; @@ -824,10 +823,10 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { case Intrinsic::mips_move_v: // Like an assignment but will always produce a move.v even if // unnecessary. - return std::make_pair(true, - CurDAG->getMachineNode(Mips::MOVE_V, DL, - Node->getValueType(0), - Node->getOperand(1))); + ReplaceNode(Node, CurDAG->getMachineNode(Mips::MOVE_V, DL, + Node->getValueType(0), + Node->getOperand(1))); + return true; } break; } @@ -843,7 +842,8 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { SDValue Value = Node->getOperand(3); SDValue ChainOut = CurDAG->getCopyToReg(ChainIn, DL, getMSACtrlReg(RegIdx), Value); - return std::make_pair(true, ChainOut.getNode()); + ReplaceNode(Node, ChainOut.getNode()); + return true; } } break; @@ -868,8 +868,8 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { SDValue Chain = CurDAG->getCopyToReg(CurDAG->getEntryNode(), DL, DestReg, SDValue(Rdhwr, 0)); SDValue ResNode = CurDAG->getCopyFromReg(Chain, DL, DestReg, PtrVT); - ReplaceUses(SDValue(Node, 0), ResNode); - return std::make_pair(true, ResNode.getNode()); + ReplaceNode(Node, ResNode.getNode()); + return true; } case ISD::BUILD_VECTOR: { @@ -894,16 +894,16 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { EVT ViaVecTy; if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) - return std::make_pair(false, nullptr); + return false; if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, 8, !Subtarget->isLittle())) - return std::make_pair(false, nullptr); + return false; switch (SplatBitSize) { default: - return std::make_pair(false, nullptr); + return false; case 8: LdiOp = Mips::LDI_B; ViaVecTy = MVT::v16i8; @@ -923,7 +923,7 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { } if (!SplatValue.isSignedIntN(10)) - return std::make_pair(false, nullptr); + return false; SDValue Imm = CurDAG->getTargetConstant(SplatValue, DL, ViaVecTy.getVectorElementType()); @@ -944,12 +944,13 @@ std::pair MipsSEDAGToDAGISel::selectNode(SDNode *Node) { MVT::i32)); } - return std::make_pair(true, Res); + ReplaceNode(Node, Res); + return true; } } - return std::make_pair(false, nullptr); + return false; } bool MipsSEDAGToDAGISel:: diff --git a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h index a894034020e9..a4cfda3586b5 100644 --- a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h +++ b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h @@ -37,8 +37,8 @@ private: std::pair selectMULT(SDNode *N, unsigned Opc, SDLoc dl, EVT Ty, bool HasLo, bool HasHi); - SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, - SDLoc DL, SDNode *Node) const; + void selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, SDLoc DL, + SDNode *Node) const; bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const; bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset, @@ -111,7 +111,7 @@ private: /// starting at bit zero. bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override; - std::pair selectNode(SDNode *Node) override; + bool trySelect(SDNode *Node) override; void processFunctionAfterISel(MachineFunction &MF) override;