forked from OSchip/llvm-project
Fixed confusion between register classes and register types.
Now %fcc registers are recognized correctly. llvm-svn: 6640
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@ -475,8 +475,10 @@ int64_t SparcV9CodeEmitter::getMachineOpValue(MachineInstr &MI,
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// At least map fakeReg into its class
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fakeReg = TM.getRegInfo().getClassRegNum(fakeReg, regClass);
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// Find the real register number for use in an instruction
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realReg = getRealRegNum(fakeReg, regClass, MI);
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std::cerr << "Reg[" << std::dec << fakeReg << "] = " << realReg << "\n";
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/////realReg = getRealRegNum(fakeReg, regClass, MI);
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realReg = getRealRegNum(fakeReg, regType, MI);
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std::cerr << MO << ": Reg[" << std::dec << fakeReg << "] = "
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<< realReg << "\n";
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rv = realReg;
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} else if (MO.isImmediate()) {
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rv = MO.getImmedValue();
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