forked from OSchip/llvm-project
Give getPointerRegClass() a "kind" value so that targets can
support multiple different pointer register classes. llvm-svn: 77501
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@ -514,8 +514,9 @@ public:
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}
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}
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/// getPointerRegClass - Returns a TargetRegisterClass used for pointer
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/// getPointerRegClass - Returns a TargetRegisterClass used for pointer
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/// values.
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/// values. If a target supports multiple different pointer register classes,
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virtual const TargetRegisterClass *getPointerRegClass() const {
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/// kind specifies which one is indicated.
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virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const {
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assert(0 && "Target didn't implement getPointerRegClass!");
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assert(0 && "Target didn't implement getPointerRegClass!");
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return 0; // Must return a value in order to compile with VS 2005
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return 0; // Must return a value in order to compile with VS 2005
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}
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}
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@ -1,4 +1,4 @@
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//===- ARMBaseRegisterInfo.cpp - ARM Register Information -----------*- C++ -*-===//
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//===- ARMBaseRegisterInfo.cpp - ARM Register Information -------*- C++ -*-===//
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//
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//
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// The LLVM Compiler Infrastructure
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// The LLVM Compiler Infrastructure
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//
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//
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@ -224,8 +224,8 @@ BitVector ARMBaseRegisterInfo::getReservedRegs(const MachineFunction &MF) const
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return Reserved;
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return Reserved;
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}
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}
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bool
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bool ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF,
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ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) const {
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unsigned Reg) const {
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switch (Reg) {
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switch (Reg) {
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default: break;
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default: break;
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case ARM::SP:
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case ARM::SP:
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@ -243,7 +243,8 @@ ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) cons
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return false;
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return false;
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}
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}
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const TargetRegisterClass *ARMBaseRegisterInfo::getPointerRegClass() const {
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const TargetRegisterClass *
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ARMBaseRegisterInfo::getPointerRegClass(unsigned Kind) const {
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return &ARM::GPRRegClass;
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return &ARM::GPRRegClass;
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}
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}
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@ -1,4 +1,4 @@
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//===- ARMBaseRegisterInfo.h - ARM Register Information Impl --------*- C++ -*-===//
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//===- ARMBaseRegisterInfo.h - ARM Register Information Impl ----*- C++ -*-===//
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//
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//
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// The LLVM Compiler Infrastructure
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// The LLVM Compiler Infrastructure
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//
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//
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@ -74,7 +74,7 @@ public:
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BitVector getReservedRegs(const MachineFunction &MF) const;
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BitVector getReservedRegs(const MachineFunction &MF) const;
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const TargetRegisterClass *getPointerRegClass() const;
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const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
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std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator>
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std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator>
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getAllocationOrder(const TargetRegisterClass *RC,
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getAllocationOrder(const TargetRegisterClass *RC,
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@ -219,8 +219,8 @@ SPURegisterInfo::getNumArgRegs()
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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/// This is used for addressing modes.
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const TargetRegisterClass * SPURegisterInfo::getPointerRegClass() const
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const TargetRegisterClass *
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{
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SPURegisterInfo::getPointerRegClass(unsigned Kind) const {
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return &SPU::R32CRegClass;
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return &SPU::R32CRegClass;
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}
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}
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@ -43,7 +43,8 @@ namespace llvm {
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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/// This is used for addressing modes.
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virtual const TargetRegisterClass *getPointerRegClass() const;
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virtual const TargetRegisterClass *
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getPointerRegClass(unsigned Kind = 0) const;
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//! Return the array of callee-saved registers
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//! Return the array of callee-saved registers
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virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
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virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
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@ -59,8 +59,7 @@ MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
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return CalleeSavedRegClasses;
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return CalleeSavedRegClasses;
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}
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}
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BitVector
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BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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BitVector Reserved(getNumRegs());
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BitVector Reserved(getNumRegs());
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// Mark 4 special registers as reserved.
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// Mark 4 special registers as reserved.
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@ -76,7 +75,8 @@ MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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return Reserved;
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return Reserved;
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}
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}
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const TargetRegisterClass* MSP430RegisterInfo::getPointerRegClass() const {
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const TargetRegisterClass *
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MSP430RegisterInfo::getPointerRegClass(unsigned Kind) const {
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return &MSP430::GR16RegClass;
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return &MSP430::GR16RegClass;
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}
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}
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@ -40,7 +40,7 @@ public:
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getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
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getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
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BitVector getReservedRegs(const MachineFunction &MF) const;
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BitVector getReservedRegs(const MachineFunction &MF) const;
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const TargetRegisterClass* getPointerRegClass() const;
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const TargetRegisterClass* getPointerRegClass(unsigned Kind = 0) const;
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bool hasFP(const MachineFunction &MF) const;
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bool hasFP(const MachineFunction &MF) const;
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bool hasReservedCallFrame(MachineFunction &MF) const;
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bool hasReservedCallFrame(MachineFunction &MF) const;
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@ -140,10 +140,10 @@ PPCRegisterInfo::PPCRegisterInfo(const PPCSubtarget &ST,
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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/// This is used for addressing modes.
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const TargetRegisterClass *PPCRegisterInfo::getPointerRegClass() const {
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const TargetRegisterClass *
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PPCRegisterInfo::getPointerRegClass(unsigned Kind) const {
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if (Subtarget.isPPC64())
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if (Subtarget.isPPC64())
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return &PPC::G8RCRegClass;
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return &PPC::G8RCRegClass;
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else
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return &PPC::GPRCRegClass;
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return &PPC::GPRCRegClass;
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}
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}
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@ -37,7 +37,7 @@ public:
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// getPointerRegClass - Return the register class to use to hold pointers.
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/// This is used for addressing modes.
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/// This is used for addressing modes.
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virtual const TargetRegisterClass *getPointerRegClass() const;
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virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const;
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/// Code Generation virtual methods...
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/// Code Generation virtual methods...
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const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
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const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
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@ -245,11 +245,10 @@ X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
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return 0;
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return 0;
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}
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}
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const TargetRegisterClass *X86RegisterInfo::getPointerRegClass() const {
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const TargetRegisterClass *X86RegisterInfo::
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const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>();
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getPointerRegClass(unsigned Kind) const {
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if (Subtarget->is64Bit())
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if (TM.getSubtarget<X86Subtarget>().is64Bit())
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return &X86::GR64RegClass;
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return &X86::GR64RegClass;
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else
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return &X86::GR32RegClass;
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return &X86::GR32RegClass;
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}
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}
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@ -102,7 +102,7 @@ public:
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/// getPointerRegClass - Returns a TargetRegisterClass used for pointer
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/// getPointerRegClass - Returns a TargetRegisterClass used for pointer
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/// values.
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/// values.
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const TargetRegisterClass *getPointerRegClass() const;
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const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
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/// getCrossCopyRegClass - Returns a legal register class to copy a register
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/// getCrossCopyRegClass - Returns a legal register class to copy a register
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/// in the specified class to or from. Returns NULL if it is possible to copy
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/// in the specified class to or from. Returns NULL if it is possible to copy
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