Give getPointerRegClass() a "kind" value so that targets can

support multiple different pointer register classes.

llvm-svn: 77501
This commit is contained in:
Chris Lattner 2009-07-29 20:31:52 +00:00
parent 0d98d8b8b3
commit ee68a483ec
11 changed files with 28 additions and 26 deletions

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@ -514,8 +514,9 @@ public:
} }
/// getPointerRegClass - Returns a TargetRegisterClass used for pointer /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
/// values. /// values. If a target supports multiple different pointer register classes,
virtual const TargetRegisterClass *getPointerRegClass() const { /// kind specifies which one is indicated.
virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const {
assert(0 && "Target didn't implement getPointerRegClass!"); assert(0 && "Target didn't implement getPointerRegClass!");
return 0; // Must return a value in order to compile with VS 2005 return 0; // Must return a value in order to compile with VS 2005
} }

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@ -1,4 +1,4 @@
//===- ARMBaseRegisterInfo.cpp - ARM Register Information -----------*- C++ -*-===// //===- ARMBaseRegisterInfo.cpp - ARM Register Information -------*- C++ -*-===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
@ -224,8 +224,8 @@ BitVector ARMBaseRegisterInfo::getReservedRegs(const MachineFunction &MF) const
return Reserved; return Reserved;
} }
bool bool ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF,
ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) const { unsigned Reg) const {
switch (Reg) { switch (Reg) {
default: break; default: break;
case ARM::SP: case ARM::SP:
@ -243,7 +243,8 @@ ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) cons
return false; return false;
} }
const TargetRegisterClass *ARMBaseRegisterInfo::getPointerRegClass() const { const TargetRegisterClass *
ARMBaseRegisterInfo::getPointerRegClass(unsigned Kind) const {
return &ARM::GPRRegClass; return &ARM::GPRRegClass;
} }

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@ -1,4 +1,4 @@
//===- ARMBaseRegisterInfo.h - ARM Register Information Impl --------*- C++ -*-===// //===- ARMBaseRegisterInfo.h - ARM Register Information Impl ----*- C++ -*-===//
// //
// The LLVM Compiler Infrastructure // The LLVM Compiler Infrastructure
// //
@ -74,7 +74,7 @@ public:
BitVector getReservedRegs(const MachineFunction &MF) const; BitVector getReservedRegs(const MachineFunction &MF) const;
const TargetRegisterClass *getPointerRegClass() const; const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator> std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator>
getAllocationOrder(const TargetRegisterClass *RC, getAllocationOrder(const TargetRegisterClass *RC,

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@ -219,8 +219,8 @@ SPURegisterInfo::getNumArgRegs()
/// getPointerRegClass - Return the register class to use to hold pointers. /// getPointerRegClass - Return the register class to use to hold pointers.
/// This is used for addressing modes. /// This is used for addressing modes.
const TargetRegisterClass * SPURegisterInfo::getPointerRegClass() const const TargetRegisterClass *
{ SPURegisterInfo::getPointerRegClass(unsigned Kind) const {
return &SPU::R32CRegClass; return &SPU::R32CRegClass;
} }

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@ -43,7 +43,8 @@ namespace llvm {
/// getPointerRegClass - Return the register class to use to hold pointers. /// getPointerRegClass - Return the register class to use to hold pointers.
/// This is used for addressing modes. /// This is used for addressing modes.
virtual const TargetRegisterClass *getPointerRegClass() const; virtual const TargetRegisterClass *
getPointerRegClass(unsigned Kind = 0) const;
//! Return the array of callee-saved registers //! Return the array of callee-saved registers
virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const; virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;

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@ -59,8 +59,7 @@ MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
return CalleeSavedRegClasses; return CalleeSavedRegClasses;
} }
BitVector BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
BitVector Reserved(getNumRegs()); BitVector Reserved(getNumRegs());
// Mark 4 special registers as reserved. // Mark 4 special registers as reserved.
@ -76,7 +75,8 @@ MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
return Reserved; return Reserved;
} }
const TargetRegisterClass* MSP430RegisterInfo::getPointerRegClass() const { const TargetRegisterClass *
MSP430RegisterInfo::getPointerRegClass(unsigned Kind) const {
return &MSP430::GR16RegClass; return &MSP430::GR16RegClass;
} }

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@ -40,7 +40,7 @@ public:
getCalleeSavedRegClasses(const MachineFunction *MF = 0) const; getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
BitVector getReservedRegs(const MachineFunction &MF) const; BitVector getReservedRegs(const MachineFunction &MF) const;
const TargetRegisterClass* getPointerRegClass() const; const TargetRegisterClass* getPointerRegClass(unsigned Kind = 0) const;
bool hasFP(const MachineFunction &MF) const; bool hasFP(const MachineFunction &MF) const;
bool hasReservedCallFrame(MachineFunction &MF) const; bool hasReservedCallFrame(MachineFunction &MF) const;

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@ -140,10 +140,10 @@ PPCRegisterInfo::PPCRegisterInfo(const PPCSubtarget &ST,
/// getPointerRegClass - Return the register class to use to hold pointers. /// getPointerRegClass - Return the register class to use to hold pointers.
/// This is used for addressing modes. /// This is used for addressing modes.
const TargetRegisterClass *PPCRegisterInfo::getPointerRegClass() const { const TargetRegisterClass *
PPCRegisterInfo::getPointerRegClass(unsigned Kind) const {
if (Subtarget.isPPC64()) if (Subtarget.isPPC64())
return &PPC::G8RCRegClass; return &PPC::G8RCRegClass;
else
return &PPC::GPRCRegClass; return &PPC::GPRCRegClass;
} }

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@ -37,7 +37,7 @@ public:
/// getPointerRegClass - Return the register class to use to hold pointers. /// getPointerRegClass - Return the register class to use to hold pointers.
/// This is used for addressing modes. /// This is used for addressing modes.
virtual const TargetRegisterClass *getPointerRegClass() const; virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const;
/// Code Generation virtual methods... /// Code Generation virtual methods...
const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;

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@ -245,11 +245,10 @@ X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A,
return 0; return 0;
} }
const TargetRegisterClass *X86RegisterInfo::getPointerRegClass() const { const TargetRegisterClass *X86RegisterInfo::
const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); getPointerRegClass(unsigned Kind) const {
if (Subtarget->is64Bit()) if (TM.getSubtarget<X86Subtarget>().is64Bit())
return &X86::GR64RegClass; return &X86::GR64RegClass;
else
return &X86::GR32RegClass; return &X86::GR32RegClass;
} }

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@ -102,7 +102,7 @@ public:
/// getPointerRegClass - Returns a TargetRegisterClass used for pointer /// getPointerRegClass - Returns a TargetRegisterClass used for pointer
/// values. /// values.
const TargetRegisterClass *getPointerRegClass() const; const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const;
/// getCrossCopyRegClass - Returns a legal register class to copy a register /// getCrossCopyRegClass - Returns a legal register class to copy a register
/// in the specified class to or from. Returns NULL if it is possible to copy /// in the specified class to or from. Returns NULL if it is possible to copy