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[X86][SSE] Relax type assertions for matchVectorShuffleAsInsertPS 

Calls to matchVectorShuffleAsInsertPS only need to ensure the inputs are 128-bit vectors. Only lowerVectorShuffleAsInsertPS needs to ensure that they are v4f32.

llvm-svn: 275028
This commit is contained in:
Simon Pilgrim 2016-07-10 22:26:05 +00:00
parent d66a7b05db
commit ee4a33ae46
1 changed files with 4 additions and 2 deletions
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6
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -8692,8 +8692,8 @@ static bool matchVectorShuffleAsInsertPS(SDValue &V1, SDValue &V2,
const SmallBitVector &Zeroable,
ArrayRef<int> Mask,
SelectionDAG &DAG) {
assert(V1.getSimpleValueType() == MVT::v4f32 && "Bad operand type!");
assert(V2.getSimpleValueType() == MVT::v4f32 && "Bad operand type!");
assert(V1.getSimpleValueType().is128BitVector() && "Bad operand type!");
assert(V2.getSimpleValueType().is128BitVector() && "Bad operand type!");
assert(Mask.size() == 4 && "Unexpected mask size for v4 shuffle!");
unsigned ZMask = 0;
int V1DstIndex = -1;
@ -8757,6 +8757,8 @@ static bool matchVectorShuffleAsInsertPS(SDValue &V1, SDValue &V2,
static SDValue lowerVectorShuffleAsInsertPS(const SDLoc &DL, SDValue V1,
SDValue V2, ArrayRef<int> Mask,
SelectionDAG &DAG) {
assert(V1.getSimpleValueType() == MVT::v4f32 && "Bad operand type!");
assert(V2.getSimpleValueType() == MVT::v4f32 && "Bad operand type!");
SmallBitVector Zeroable = computeZeroableShuffleElements(Mask, V1, V2);
// Attempt to match the insertps pattern.