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X86: Disable cmov-memory patterns on subtargets without cmov. 

Fixes PR15115.

llvm-svn: 175962
This commit is contained in:
Benjamin Kramer 2013-02-23 10:40:58 +00:00
parent 63acc73f21
commit ee23dcb461
2 changed files with 19 additions and 6 deletions
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14
llvm/lib/Target/X86/X86InstrCompiler.td
View File

@ -1081,12 +1081,14 @@ def : Pat<(X86cmp GR64:$src1, 0),
// inverted.
multiclass CMOVmr<PatLeaf InvertedCond, Instruction Inst16, Instruction Inst32,
Instruction Inst64> {
def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS),
(Inst16 GR16:$src2, addr:$src1)>;
def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS),
(Inst32 GR32:$src2, addr:$src1)>;
def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS),
(Inst64 GR64:$src2, addr:$src1)>;
let Predicates = [HasCMov] in {
def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS),
(Inst16 GR16:$src2, addr:$src1)>;
def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS),
(Inst32 GR32:$src2, addr:$src1)>;
def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS),
(Inst64 GR64:$src2, addr:$src1)>;
}
}
defm : CMOVmr<X86_COND_B , CMOVAE16rm, CMOVAE32rm, CMOVAE64rm>;

11
llvm/test/CodeGen/X86/no-cmov.ll Normal file
View File

@ -0,0 +1,11 @@
; RUN: llc -march=x86 -mcpu=i486 < %s | FileCheck %s
define i32 @test1(i32 %g, i32* %j) {
%tobool = icmp eq i32 %g, 0
%cmp = load i32* %j, align 4
%retval.0 = select i1 %tobool, i32 1, i32 %cmp
ret i32 %retval.0
; CHECK: test1:
; CHECK-NOT: cmov
}