forked from OSchip/llvm-project
* Converted C-style comments to C++
* Doxygenified comments * Reordered #includes llvm-svn: 10503
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@ -13,12 +13,12 @@
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//===----------------------------------------------------------------------===//
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#include "SparcInternals.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/BasicBlock.h"
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#include "llvm/Pass.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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@ -62,7 +62,7 @@ DeleteInstruction(MachineBasicBlock& mvec,
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static bool IsUselessCopy(const TargetMachine &target, const MachineInstr* MI) {
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if (MI->getOpCode() == V9::FMOVS || MI->getOpCode() == V9::FMOVD) {
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return (/* both operands are allocated to the same register */
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return (// both operands are allocated to the same register
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MI->getOperand(0).getAllocatedRegNum() ==
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MI->getOperand(1).getAllocatedRegNum());
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} else if (MI->getOpCode() == V9::ADDr || MI->getOpCode() == V9::ORr ||
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@ -78,14 +78,14 @@ static bool IsUselessCopy(const TargetMachine &target, const MachineInstr* MI) {
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if (srcWithDestReg == 2)
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return false;
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else {
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/* else source and dest are allocated to the same register */
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// else source and dest are allocated to the same register
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unsigned otherOp = 1 - srcWithDestReg;
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return (/* either operand otherOp is register %g0 */
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return (// either operand otherOp is register %g0
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(MI->getOperand(otherOp).hasAllocatedReg() &&
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MI->getOperand(otherOp).getAllocatedRegNum() ==
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target.getRegInfo().getZeroRegNum()) ||
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/* or operand otherOp == 0 */
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// or operand otherOp == 0
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(MI->getOperand(otherOp).getType()
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== MachineOperand::MO_SignExtendedImmed &&
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MI->getOperand(otherOp).getImmedValue() == 0));
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@ -117,6 +117,11 @@ public:
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PeepholeOpts(const TargetMachine &TM): target(TM) { }
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bool runOnBasicBlock(BasicBlock &BB); // apply this pass to each BB
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virtual const char *getPassName() const { return "Peephole Optimization"; }
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// getAnalysisUsage - this pass preserves the CFG
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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}
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};
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// Apply a list of peephole optimizations to this machine instruction
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@ -125,7 +130,7 @@ public:
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//
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bool PeepholeOpts::visit(MachineBasicBlock& mvec,
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MachineBasicBlock::iterator BBI) const {
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/* Remove redundant copy instructions */
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// Remove redundant copy instructions
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return RemoveUselessCopies(mvec, BBI, target);
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}
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@ -157,11 +162,8 @@ bool PeepholeOpts::runOnBasicBlock(BasicBlock &BB) {
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return true;
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}
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//===----------------------------------------------------------------------===//
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// createPeepholeOptsPass - Public entrypoint for peephole optimization
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// and this file as a whole...
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//
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/// createPeepholeOptsPass - Public entry point for peephole optimization
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///
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FunctionPass* createPeepholeOptsPass(const TargetMachine &TM) {
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return new PeepholeOpts(TM);
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}
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