forked from OSchip/llvm-project
[X86][SSE] Use llvm min/max intrinsics instead of (deprecated) sse intrinsics. NFCI.
These are auto-upgraded to the equivalent llvm variants now.
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@ -5,7 +5,7 @@ define void @test() {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %bb2
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; CHECK-NEXT: retq
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%tmp1 = call <8 x i16> @llvm.x86.sse2.pmins.w( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) )
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%tmp1 = call <8 x i16> @llvm.smin.v8i16( <8 x i16> zeroinitializer, <8 x i16> bitcast (<4 x i32> < i32 7, i32 7, i32 7, i32 7 > to <8 x i16>) )
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%tmp2 = bitcast <8 x i16> %tmp1 to <4 x i32>
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br i1 false, label %bb1, label %bb2
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@ -17,4 +17,4 @@ bb1:
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ret void
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}
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declare <8 x i16> @llvm.x86.sse2.pmins.w(<8 x i16>, <8 x i16>)
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declare <8 x i16> @llvm.smin.v8i16(<8 x i16>, <8 x i16>)
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@ -10,11 +10,11 @@ define void @test(<4 x i32>* nocapture %p) nounwind {
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; CHECK-NEXT: vmovdqu %xmm0, (%rdi)
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; CHECK-NEXT: retq
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%a = load <4 x i32>, <4 x i32>* %p, align 1
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%b = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a, <4 x i32> zeroinitializer) nounwind
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%b = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %a, <4 x i32> zeroinitializer) nounwind
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%c = shufflevector <4 x i32> %b, <4 x i32> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>
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%d = shufflevector <8 x i32> %c, <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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store <4 x i32> %d, <4 x i32>* %p, align 1
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ret void
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}
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declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>) nounwind readnone
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declare <4 x i32> @llvm.smax.v4i32(<4 x i32>, <4 x i32>) nounwind readnone
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@ -1,7 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=corei7 | FileCheck %s
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declare <4 x i32> @llvm.x86.sse41.pminud(<4 x i32>, <4 x i32>)
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declare <4 x i32> @llvm.umin.v4i32(<4 x i32>, <4 x i32>)
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define <2 x i16> @good(<4 x i32>*, <4 x i8>*) {
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; CHECK-LABEL: good:
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@ -11,7 +11,7 @@ define <2 x i16> @good(<4 x i32>*, <4 x i8>*) {
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; CHECK-NEXT: retq
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entry:
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%2 = load <4 x i32>, <4 x i32>* %0, align 16
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%3 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %2, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)
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%3 = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %2, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)
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%4 = extractelement <4 x i32> %3, i32 0
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%5 = extractelement <4 x i32> %3, i32 1
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%6 = extractelement <4 x i32> %3, i32 2
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@ -30,7 +30,7 @@ define <2 x i16> @bad(<4 x i32>*, <4 x i8>*) {
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; CHECK-NEXT: retq
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entry:
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%2 = load <4 x i32>, <4 x i32>* %0, align 16
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%3 = call <4 x i32> @llvm.x86.sse41.pminud(<4 x i32> %2, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)
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%3 = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %2, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)
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%4 = extractelement <4 x i32> %3, i32 0
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%5 = extractelement <4 x i32> %3, i32 1
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%6 = extractelement <4 x i32> %3, i32 2
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