forked from OSchip/llvm-project
[X86] AMD Zen 3: AVX XMM moves are zero-cycle
I've verified this with llvm-exegesis. This is not limited to zero registers.
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@ -1474,10 +1474,12 @@ def : IsOptimizableRegisterMove<[
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// SSE variants.
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// SSE variants.
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MOVAPSrr, MOVUPSrr,
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MOVAPSrr, MOVUPSrr,
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MOVAPDrr, MOVUPDrr,
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MOVAPDrr, MOVUPDrr,
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MOVDQArr, MOVDQUrr
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MOVDQArr, MOVDQUrr,
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// AVX variants.
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// AVX variants.
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// FIXME
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VMOVAPSrr, VMOVUPSrr,
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VMOVAPDrr, VMOVUPDrr,
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VMOVDQArr, VMOVDQUrr
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], TruePred >
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], TruePred >
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]>;
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]>;
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