[AVX512] Adding VPERMQ VPERMPD Intrinsics

Differential Revision: http://reviews.llvm.org/D16194

llvm-svn: 258006
This commit is contained in:
Michael Zuckerman 2016-01-17 08:32:14 +00:00
parent 9e9ae60b9d
commit ede597c753
4 changed files with 105 additions and 1 deletions

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@ -2463,7 +2463,21 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
llvm_i8_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrNoMem]>; llvm_i8_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrNoMem]>;
} }
// Permute
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_avx512_mask_perm_df_256 : GCCBuiltin<"__builtin_ia32_permdf256_mask">,
Intrinsic<[llvm_v4f64_ty], [llvm_v4f64_ty,
llvm_i8_ty, llvm_v4f64_ty, llvm_i8_ty], [IntrNoMem]>;
def int_x86_avx512_mask_perm_df_512 : GCCBuiltin<"__builtin_ia32_permdf512_mask">,
Intrinsic<[llvm_v8f64_ty], [llvm_v8f64_ty,
llvm_i8_ty, llvm_v8f64_ty, llvm_i8_ty], [IntrNoMem]>;
def int_x86_avx512_mask_perm_di_256 : GCCBuiltin<"__builtin_ia32_permdi256_mask">,
Intrinsic<[llvm_v4i64_ty], [llvm_v4i64_ty,
llvm_i8_ty, llvm_v4i64_ty, llvm_i8_ty], [IntrNoMem]>;
def int_x86_avx512_mask_perm_di_512 : GCCBuiltin<"__builtin_ia32_permdi512_mask">,
Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty,
llvm_i8_ty, llvm_v8i64_ty, llvm_i8_ty], [IntrNoMem]>;
}
// Pack ops. // Pack ops.
let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_avx2_packsswb : GCCBuiltin<"__builtin_ia32_packsswb256">, def int_x86_avx2_packsswb : GCCBuiltin<"__builtin_ia32_packsswb256">,

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@ -1015,6 +1015,10 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx512_mask_pcmpgt_w_128, CMP_MASK, X86ISD::PCMPGTM, 0), X86_INTRINSIC_DATA(avx512_mask_pcmpgt_w_128, CMP_MASK, X86ISD::PCMPGTM, 0),
X86_INTRINSIC_DATA(avx512_mask_pcmpgt_w_256, CMP_MASK, X86ISD::PCMPGTM, 0), X86_INTRINSIC_DATA(avx512_mask_pcmpgt_w_256, CMP_MASK, X86ISD::PCMPGTM, 0),
X86_INTRINSIC_DATA(avx512_mask_pcmpgt_w_512, CMP_MASK, X86ISD::PCMPGTM, 0), X86_INTRINSIC_DATA(avx512_mask_pcmpgt_w_512, CMP_MASK, X86ISD::PCMPGTM, 0),
X86_INTRINSIC_DATA(avx512_mask_perm_df_256, INTR_TYPE_2OP_MASK, X86ISD::VPERMI, 0),
X86_INTRINSIC_DATA(avx512_mask_perm_df_512, INTR_TYPE_2OP_MASK, X86ISD::VPERMI, 0),
X86_INTRINSIC_DATA(avx512_mask_perm_di_256, INTR_TYPE_2OP_MASK, X86ISD::VPERMI, 0),
X86_INTRINSIC_DATA(avx512_mask_perm_di_512, INTR_TYPE_2OP_MASK, X86ISD::VPERMI, 0),
X86_INTRINSIC_DATA(avx512_mask_pmaddubs_w_128, INTR_TYPE_2OP_MASK, X86_INTRINSIC_DATA(avx512_mask_pmaddubs_w_128, INTR_TYPE_2OP_MASK,
X86ISD::VPMADDUBSW, 0), X86ISD::VPMADDUBSW, 0),
X86_INTRINSIC_DATA(avx512_mask_pmaddubs_w_256, INTR_TYPE_2OP_MASK, X86_INTRINSIC_DATA(avx512_mask_pmaddubs_w_256, INTR_TYPE_2OP_MASK,

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@ -6918,3 +6918,45 @@ define <8 x i64>@test_int_x86_avx512_mask_pmovsxw_q_512(<8 x i16> %x0, <8 x i64>
%res4 = add <8 x i64> %res3, %res2 %res4 = add <8 x i64> %res3, %res2
ret <8 x i64> %res4 ret <8 x i64> %res4
} }
declare <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double>, i8, <8 x double>, i8)
define <8 x double>@test_int_x86_avx512_mask_perm_df_512(<8 x double> %x0, i8 %x1, <8 x double> %x2, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_perm_df_512:
; CHECK: ## BB#0:
; CHECK-NEXT: movzbl %sil, %eax
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vpermpd $3, %zmm0, %zmm1 {%k1}
; CHECK-NEXT: vpermpd $3, %zmm0, %zmm2 {%k1} {z}
; CHECK-NEXT: vpermpd $3, %zmm0, %zmm0
; CHECK-NEXT: vaddpd %zmm2, %zmm1, %zmm1
; CHECK-NEXT: vaddpd %zmm0, %zmm1, %zmm0
; CHECK-NEXT: retq
%res = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i8 3, <8 x double> %x2, i8 %x3)
%res1 = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i8 3, <8 x double> zeroinitializer, i8 %x3)
%res2 = call <8 x double> @llvm.x86.avx512.mask.perm.df.512(<8 x double> %x0, i8 3, <8 x double> %x2, i8 -1)
%res3 = fadd <8 x double> %res, %res1
%res4 = fadd <8 x double> %res3, %res2
ret <8 x double> %res4
}
declare <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64>, i8, <8 x i64>, i8)
define <8 x i64>@test_int_x86_avx512_mask_perm_di_512(<8 x i64> %x0, i8 %x1, <8 x i64> %x2, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_perm_di_512:
; CHECK: ## BB#0:
; CHECK-NEXT: movzbl %sil, %eax
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vpermq $3, %zmm0, %zmm1 {%k1}
; CHECK-NEXT: vpermq $3, %zmm0, %zmm2 {%k1} {z}
; CHECK-NEXT: vpermq $3, %zmm0, %zmm0
; CHECK-NEXT: vpaddq %zmm2, %zmm1, %zmm1
; CHECK-NEXT: vpaddq %zmm0, %zmm1, %zmm0
; CHECK-NEXT: retq
%res = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i8 3, <8 x i64> %x2, i8 %x3)
%res1 = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i8 3, <8 x i64> zeroinitializer, i8 %x3)
%res2 = call <8 x i64> @llvm.x86.avx512.mask.perm.di.512(<8 x i64> %x0, i8 3, <8 x i64> %x2, i8 -1)
%res3 = add <8 x i64> %res, %res1
%res4 = add <8 x i64> %res3, %res2
ret <8 x i64> %res4
}

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@ -7496,3 +7496,47 @@ define <4 x i64>@test_int_x86_avx512_mask_pmovsxw_q_256(<8 x i16> %x0, <4 x i64>
%res4 = add <4 x i64> %res3, %res2 %res4 = add <4 x i64> %res3, %res2
ret <4 x i64> %res4 ret <4 x i64> %res4
} }
declare <4 x double> @llvm.x86.avx512.mask.perm.df.256(<4 x double>, i8, <4 x double>, i8)
define <4 x double>@test_int_x86_avx512_mask_perm_df_256(<4 x double> %x0, i8 %x1, <4 x double> %x2, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_perm_df_256:
; CHECK: ## BB#0:
; CHECK-NEXT: movzbl %sil, %eax
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vpermpd $3, %ymm0, %ymm1 {%k1}
; CHECK-NEXT: vpermpd $3, %ymm0, %ymm2 {%k1} {z}
; CHECK-NEXT: vpermpd $3, %ymm0, %ymm0
; CHECK-NEXT: ## ymm0 = ymm0[3,0,0,0]
; CHECK-NEXT: vaddpd %ymm2, %ymm1, %ymm1
; CHECK-NEXT: vaddpd %ymm0, %ymm1, %ymm0
; CHECK-NEXT: retq
%res = call <4 x double> @llvm.x86.avx512.mask.perm.df.256(<4 x double> %x0, i8 3, <4 x double> %x2, i8 %x3)
%res1 = call <4 x double> @llvm.x86.avx512.mask.perm.df.256(<4 x double> %x0, i8 3, <4 x double> zeroinitializer, i8 %x3)
%res2 = call <4 x double> @llvm.x86.avx512.mask.perm.df.256(<4 x double> %x0, i8 3, <4 x double> %x2, i8 -1)
%res3 = fadd <4 x double> %res, %res1
%res4 = fadd <4 x double> %res3, %res2
ret <4 x double> %res4
}
declare <4 x i64> @llvm.x86.avx512.mask.perm.di.256(<4 x i64>, i8, <4 x i64>, i8)
define <4 x i64>@test_int_x86_avx512_mask_perm_di_256(<4 x i64> %x0, i8 %x1, <4 x i64> %x2, i8 %x3) {
; CHECK-LABEL: test_int_x86_avx512_mask_perm_di_256:
; CHECK: ## BB#0:
; CHECK-NEXT: movzbl %sil, %eax
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vpermq $3, %ymm0, %ymm1 {%k1}
; CHECK-NEXT: vpermq $3, %ymm0, %ymm2 {%k1} {z}
; CHECK-NEXT: vpermq $3, %ymm0, %ymm0
; CHECK-NEXT: ## ymm0 = ymm0[3,0,0,0]
; CHECK-NEXT: vpaddq %ymm2, %ymm1, %ymm1
; CHECK-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; CHECK-NEXT: retq
%res = call <4 x i64> @llvm.x86.avx512.mask.perm.di.256(<4 x i64> %x0, i8 3, <4 x i64> %x2, i8 %x3)
%res1 = call <4 x i64> @llvm.x86.avx512.mask.perm.di.256(<4 x i64> %x0, i8 3, <4 x i64> zeroinitializer, i8 %x3)
%res2 = call <4 x i64> @llvm.x86.avx512.mask.perm.di.256(<4 x i64> %x0, i8 3, <4 x i64> %x2, i8 -1)
%res3 = add <4 x i64> %res, %res1
%res4 = add <4 x i64> %res3, %res2
ret <4 x i64> %res4
}