maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[mips] Implement generation of relocations "chains" used by N32 ABI 

In case of using a "nested" relocation expressions like this
`%hi(%neg(%gp_rel()))`, N32 ABI requires generation of three consecutive
relocations. That differs from the N64 ABI case where all relocations
are packed into the single relocation record.

llvm-svn: 313879
This commit is contained in:
Simon Atanasyan 2017-09-21 14:04:53 +00:00
parent 9f676a7798
commit ede43b71f8
2 changed files with 39 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
llvm/lib/MC/ELFObjectWriter.cpp
View File

@ -1131,6 +1131,23 @@ void ELFObjectWriter::writeRelocations(const MCAssembler &Asm,
if (hasRelocationAddend())
write(uint32_t(Entry.Addend));
if (TargetObjectWriter->getEMachine() == ELF::EM_MIPS) {
if (uint32_t RType = TargetObjectWriter->getRType2(Entry.Type)) {
write(uint32_t(Entry.Offset));
ERE32.setSymbolAndType(0, RType);
write(ERE32.r_info);
write(uint32_t(0));
}
if (uint32_t RType = TargetObjectWriter->getRType3(Entry.Type)) {
write(uint32_t(Entry.Offset));
ERE32.setSymbolAndType(0, RType);
write(ERE32.r_info);
write(uint32_t(0));
}
}
}
}
}

22
llvm/test/MC/Mips/elf-N32.s Normal file
View File

@ -0,0 +1,22 @@
// Check generation of N32 ABI relocations.
// RUN: llvm-mc -filetype=obj -triple=mips64-linux-gnu -mcpu=mips3 \
// RUN: -target-abi=n32 %s -o - | llvm-readobj -r | FileCheck %s
// CHECK: Relocations [
// CHECK-NEXT: Section (3) .rela.text {
// CHECK-NEXT: 0x0 R_MIPS_GPREL16 foo 0x4
// CHECK-NEXT: 0x0 R_MIPS_SUB - 0x0
// CHECK-NEXT: 0x0 R_MIPS_HI16 - 0x0
// CHECK-NEXT: 0x4 R_MIPS_GPREL16 foo 0x4
// CHECK-NEXT: 0x4 R_MIPS_SUB - 0x0
// CHECK-NEXT: 0x4 R_MIPS_LO16 - 0x0
// CHECK-NEXT: }
.globl foo
.ent foo
foo:
lui $gp, %hi(%neg(%gp_rel(foo+4)))
addiu $gp, $gp, %lo(%neg(%gp_rel(foo+4)))
daddu $gp, $gp, $25
.end foo