forked from OSchip/llvm-project
[Passes] Run sinking/hoisting in SimplifyCFG earlier.
Hoisting and sinking instructions out of conditional blocks enables additional vectorization by: 1. Executing memory accesses unconditionally. 2. Reducing the number of instructions that need predication. After disabling early hoisting / sinking, we miss out on a few vectorization opportunities. One of those is causing a ~10% performance regression in one of the Geekbench benchmarks on AArch64. This patch tires to recover the regression by running hoisting/sinking as part of a SimplifyCFG run after LoopRotate and before LoopVectorize. Note that in the legacy pass-manager, we run LoopRotate just before vectorization again and there's no SimplifyCFG run in between, so the sinking/hoisting may impact the later run on LoopRotate. But the impact should be limited and the benefit of hosting/sinking at this stage should outweigh the risk of not rotating. Compile-time impact looks slightly positive for most cases. http://llvm-compile-time-tracker.com/compare.php?from=2ea7fb7b1c045a7d60fcccf3df3ebb26aa3699e5&to=e58b4a763c691da651f25996aad619cb3d946faf&stat=instructions NewPM-O3: geomean -0.19% NewPM-ReleaseThinLTO: geoman -0.54% NewPM-ReleaseLTO-g: geomean -0.03% With a few benchmarks seeing a notable increase, but also some improvements. Alternative to D101290. Reviewed By: lebedev.ri Differential Revision: https://reviews.llvm.org/D101468
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@ -847,7 +847,8 @@ PassBuilder::buildFunctionSimplificationPipeline(OptimizationLevel Level,
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for (auto &C : ScalarOptimizerLateEPCallbacks)
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C(FPM, Level);
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FPM.addPass(SimplifyCFGPass());
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FPM.addPass(SimplifyCFGPass(
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SimplifyCFGOptions().hoistCommonInsts(true).sinkCommonInsts(true)));
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FPM.addPass(InstCombinePass());
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invokePeepholeEPCallbacks(FPM, Level);
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@ -1322,8 +1323,6 @@ PassBuilder::buildModuleOptimizationPipeline(OptimizationLevel Level,
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// convert to more optimized IR using more aggressive simplify CFG options.
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// The extra sinking transform can create larger basic blocks, so do this
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// before SLP vectorization.
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// FIXME: study whether hoisting and/or sinking of common instructions should
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// be delayed until after SLP vectorizer.
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OptimizePM.addPass(SimplifyCFGPass(SimplifyCFGOptions()
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.forwardSwitchCondToPhi(true)
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.convertSwitchToLookupTable(true)
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@ -509,7 +509,9 @@ void PassManagerBuilder::addFunctionSimplificationPasses(
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if (RerollLoops)
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MPM.add(createLoopRerollPass());
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MPM.add(createCFGSimplificationPass()); // Merge & remove BBs
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// Merge & remove BBs and sink & hoist common instructions.
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MPM.add(createCFGSimplificationPass(
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SimplifyCFGOptions().hoistCommonInsts(true).sinkCommonInsts(true)));
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// Clean up after everything.
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MPM.add(createInstructionCombiningPass());
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addExtensionsToPM(EP_Peephole, MPM);
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@ -823,8 +825,6 @@ void PassManagerBuilder::populateModulePassManager(
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// convert to more optimized IR using more aggressive simplify CFG options.
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// The extra sinking transform can create larger basic blocks, so do this
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// before SLP vectorization.
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// FIXME: study whether hoisting and/or sinking of common instructions should
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// be delayed until after SLP vectorizer.
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MPM.add(createCFGSimplificationPass(SimplifyCFGOptions()
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.forwardSwitchCondToPhi(true)
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.convertSwitchToLookupTable(true)
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@ -11,9 +11,12 @@ entry:
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br i1 %tobool, label %if.else, label %if.then, !prof !30
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if.then:
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; The calls here ensure that the instructions are not hoisted by SimplifyCFG.
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call void @clobber()
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%0 = load i32, i32* @odd, align 4
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%inc = add i32 %0, 1
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store i32 %inc, i32* @odd, align 4
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call void @clobber()
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br label %if.end
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if.else:
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@ -26,6 +29,8 @@ if.end:
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ret void
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}
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declare void @clobber()
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define internal fastcc i32 @cond(i32 %i) #1 !prof !29 !PGOFuncName !35 {
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entry:
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%rem = srem i32 %i, 2
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@ -103,10 +103,10 @@ for.end:
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ret void
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}
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; CSPGOSUMMARY-LABEL: @foo
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; CSPGOSUMMARY: %even.sink{{[0-9]*}} = select i1 %tobool.i{{[0-9]*}}, i32* @even, i32* @odd
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; CSPGOSUMMARY-SAME: !prof ![[BW1_CSPGO_FOO:[0-9]+]]
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; CSPGOSUMMARY: %even.sink{{[0-9]*}} = select i1 %tobool.i{{[0-9]*}}, i32* @even, i32* @odd
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; CSPGOSUMMARY-SAME: !prof ![[BW2_CSPGO_FOO:[0-9]+]]
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; CSPGOSUMMARY: %odd.sink.i{{[0-9]*}} = select i1 %tobool.i{{[0-9]*}}, i32* @even, i32* @odd
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; CSPGOSUMMARY-SAME: !prof ![[BW_CSPGO_BAR]]
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; CSPGOSUMMARY: %odd.sink.i{{[0-9]*}} = select i1 %tobool.i{{[0-9]*}}, i32* @even, i32* @odd
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; CSPGOSUMMARY-SAME: !prof ![[BW_CSPGO_BAR]]
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declare dso_local i32 @bar_m(i32)
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declare dso_local i32 @bar_m2(i32)
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@ -152,5 +152,3 @@ entry:
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; CSPGOSUMMARY: {{![0-9]+}} = !{!"MaxFunctionCount", i64 200000}
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; CSPGOSUMMARY: {{![0-9]+}} = !{!"NumCounts", i64 23}
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; CSPGOSUMMARY-DAG: ![[BW_CSPGO_BAR]] = !{!"branch_weights", i32 100000, i32 100000}
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; CSPGOSUMMARY-DAG: ![[BW1_CSPGO_FOO]] = !{!"branch_weights", i32 100000, i32 0}
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; CSPGOSUMMARY-DAG: ![[BW2_CSPGO_FOO]] = !{!"branch_weights", i32 0, i32 100000}
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@ -8,6 +8,7 @@
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; RUN: -r=%t1.bc,bar,l \
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; RUN: -r=%t1.bc,main,plx \
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; RUN: -r=%t2.bc,bar,pl \
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; RUN: -r=%t2.bc,clobber,pl \
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; RUN: -r=%t2.bc,odd,pl \
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; RUN: -r=%t2.bc,even,pl
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; RUN: llvm-dis %t.1.4.opt.bc -o - | FileCheck %s --check-prefix=CSUSE
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@ -140,16 +140,61 @@ for.end: ; preds = %for.cond.cleanup
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define void @loop2(float* %A, float* %B, i32* %C, float %x) {
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; CHECK-LABEL: @loop2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP_BODY:%.*]]
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; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr float, float* [[B:%.*]], i64 10000
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; CHECK-NEXT: [[SCEVGEP6:%.*]] = getelementptr i32, i32* [[C:%.*]], i64 10000
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; CHECK-NEXT: [[SCEVGEP9:%.*]] = getelementptr float, float* [[A:%.*]], i64 10000
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; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32* [[SCEVGEP6]] to float*
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; CHECK-NEXT: [[BOUND0:%.*]] = icmp ugt float* [[TMP0]], [[B]]
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[SCEVGEP]] to i32*
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; CHECK-NEXT: [[BOUND1:%.*]] = icmp ugt i32* [[TMP1]], [[C]]
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; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
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; CHECK-NEXT: [[BOUND011:%.*]] = icmp ugt float* [[SCEVGEP9]], [[B]]
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; CHECK-NEXT: [[BOUND112:%.*]] = icmp ugt float* [[SCEVGEP]], [[A]]
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; CHECK-NEXT: [[FOUND_CONFLICT13:%.*]] = and i1 [[BOUND011]], [[BOUND112]]
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; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT13]]
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; CHECK-NEXT: br i1 [[CONFLICT_RDX]], label [[LOOP_BODY:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[X:%.*]], i32 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x float> [[BROADCAST_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[DOT0:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 0
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; CHECK-NEXT: [[DOT017:%.*]] = getelementptr inbounds float, float* [[A]], i64 0
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; CHECK-NEXT: [[DOT018:%.*]] = getelementptr inbounds float, float* [[B]], i64 0
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; CHECK-NEXT: [[INDEX_NEXT_0:%.*]] = add i64 0, 4
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX_NEXT_PHI:%.*]] = phi i64 [ [[INDEX_NEXT_0]], [[VECTOR_PH]] ], [ [[INDEX_NEXT_1:%.*]], [[VECTOR_BODY_VECTOR_BODY_CRIT_EDGE:%.*]] ]
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; CHECK-NEXT: [[DOTPHI:%.*]] = phi float* [ [[DOT018]], [[VECTOR_PH]] ], [ [[DOT120:%.*]], [[VECTOR_BODY_VECTOR_BODY_CRIT_EDGE]] ]
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; CHECK-NEXT: [[DOTPHI21:%.*]] = phi float* [ [[DOT017]], [[VECTOR_PH]] ], [ [[DOT119:%.*]], [[VECTOR_BODY_VECTOR_BODY_CRIT_EDGE]] ]
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; CHECK-NEXT: [[DOTPHI22:%.*]] = phi i32* [ [[DOT0]], [[VECTOR_PH]] ], [ [[DOT1:%.*]], [[VECTOR_BODY_VECTOR_BODY_CRIT_EDGE]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[DOTPHI22]] to <4 x i32>*
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; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4, !alias.scope !8
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq <4 x i32> [[WIDE_LOAD]], <i32 20, i32 20, i32 20, i32 20>
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; CHECK-NEXT: [[TMP4:%.*]] = bitcast float* [[DOTPHI21]] to <4 x float>*
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; CHECK-NEXT: [[WIDE_LOAD14:%.*]] = load <4 x float>, <4 x float>* [[TMP4]], align 4, !alias.scope !11
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; CHECK-NEXT: [[TMP5:%.*]] = fmul <4 x float> [[WIDE_LOAD14]], [[BROADCAST_SPLAT]]
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast float* [[DOTPHI]] to <4 x float>*
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; CHECK-NEXT: [[WIDE_LOAD15:%.*]] = load <4 x float>, <4 x float>* [[TMP6]], align 4, !alias.scope !13, !noalias !15
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; CHECK-NEXT: [[TMP7:%.*]] = fadd <4 x float> [[TMP5]], [[WIDE_LOAD15]]
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> [[TMP3]], <4 x float> [[TMP5]], <4 x float> [[TMP7]]
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; CHECK-NEXT: [[TMP8:%.*]] = bitcast float* [[DOTPHI]] to <4 x float>*
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; CHECK-NEXT: store <4 x float> [[PREDPHI]], <4 x float>* [[TMP8]], align 4, !alias.scope !13, !noalias !15
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; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT_PHI]], 10000
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; CHECK-NEXT: br i1 [[TMP9]], label [[EXIT:%.*]], label [[VECTOR_BODY_VECTOR_BODY_CRIT_EDGE]], !llvm.loop [[LOOP16:![0-9]+]]
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; CHECK: vector.body.vector.body_crit_edge:
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; CHECK-NEXT: [[DOT1]] = getelementptr inbounds i32, i32* [[C]], i64 [[INDEX_NEXT_PHI]]
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; CHECK-NEXT: [[DOT119]] = getelementptr inbounds float, float* [[A]], i64 [[INDEX_NEXT_PHI]]
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; CHECK-NEXT: [[DOT120]] = getelementptr inbounds float, float* [[B]], i64 [[INDEX_NEXT_PHI]]
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; CHECK-NEXT: [[INDEX_NEXT_1]] = add i64 [[INDEX_NEXT_PHI]], 4
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; CHECK-NEXT: br label [[VECTOR_BODY]]
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; CHECK: loop.body:
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; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
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; CHECK-NEXT: [[C_GEP:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i64 [[IV1]]
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; CHECK-NEXT: [[IV1:%.*]] = phi i64 [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: [[C_GEP:%.*]] = getelementptr inbounds i32, i32* [[C]], i64 [[IV1]]
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; CHECK-NEXT: [[C_LV:%.*]] = load i32, i32* [[C_GEP]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[C_LV]], 20
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; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds float, float* [[A:%.*]], i64 [[IV1]]
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; CHECK-NEXT: [[A_GEP_0:%.*]] = getelementptr inbounds float, float* [[A]], i64 [[IV1]]
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; CHECK-NEXT: [[A_LV_0:%.*]] = load float, float* [[A_GEP_0]], align 4
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; CHECK-NEXT: [[MUL2_I81_I:%.*]] = fmul float [[A_LV_0]], [[X:%.*]]
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; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 [[IV1]]
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; CHECK-NEXT: [[MUL2_I81_I:%.*]] = fmul float [[A_LV_0]], [[X]]
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; CHECK-NEXT: [[B_GEP_0:%.*]] = getelementptr inbounds float, float* [[B]], i64 [[IV1]]
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; CHECK-NEXT: br i1 [[CMP]], label [[LOOP_LATCH]], label [[ELSE:%.*]]
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; CHECK: else:
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; CHECK-NEXT: [[B_LV:%.*]] = load float, float* [[B_GEP_0]], align 4
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@ -160,7 +205,7 @@ define void @loop2(float* %A, float* %B, i32* %C, float %x) {
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; CHECK-NEXT: store float [[ADD_SINK]], float* [[B_GEP_0]], align 4
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV1]], 1
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; CHECK-NEXT: [[CMP_0:%.*]] = icmp ult i64 [[IV1]], 9999
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; CHECK-NEXT: br i1 [[CMP_0]], label [[LOOP_BODY]], label [[EXIT:%.*]]
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; CHECK-NEXT: br i1 [[CMP_0]], label [[LOOP_BODY]], label [[EXIT]], !llvm.loop [[LOOP17:![0-9]+]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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