forked from OSchip/llvm-project
[X86] getFauxShuffle - don't assume an UNDEF src element for AND/ANDNP results in an UNDEF shuffle mask index
The other src element might be zero, guaranteeing zero. Fixes #55157
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@ -8041,11 +8041,11 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
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uint64_t ZeroMask = IsAndN ? 255 : 0;
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if (!getTargetConstantBitsFromNode(IsAndN ? N0 : N1, 8, UndefElts, EltBits))
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return false;
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// We can't assume an undef src element gives an undef dst - the other src
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// might be zero.
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if (!UndefElts.isZero())
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return false;
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for (int i = 0, e = (int)EltBits.size(); i != e; ++i) {
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if (UndefElts[i]) {
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Mask.push_back(SM_SentinelUndef);
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continue;
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}
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const APInt &ByteBits = EltBits[i];
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if (ByteBits != 0 && ByteBits != 255)
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return false;
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@ -3333,11 +3333,17 @@ define void @PR45604(<32 x i16>* %dst, <8 x i16>* %src) {
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ret void
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}
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; FIXME: getFauxShuffle AND/ANDN decoding wrongly assumes an undef src always gives an undef dst.
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; getFauxShuffle AND/ANDN decoding wrongly assumed an undef src always gives an undef dst.
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define <2 x i64> @PR55157(<16 x i8>* %0) {
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; CHECK-LABEL: PR55157:
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; CHECK: # %bb.0:
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; CHECK-NEXT: retq
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; SSE-LABEL: PR55157:
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; SSE: # %bb.0:
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR55157:
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; AVX: # %bb.0:
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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%2 = load <16 x i8>, <16 x i8>* %0, align 16
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%3 = icmp eq <16 x i8> %2, zeroinitializer
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%4 = tail call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> zeroinitializer, <16 x i8> zeroinitializer)
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