maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

add a missed case for binary op FMF propagation under select folds 

llvm-svn: 339938
This commit is contained in:
Michael Berg 2018-08-16 20:59:45 +00:00
parent 5f50ffe83b
commit ed89d069f4
3 changed files with 5 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
View File

@ -354,7 +354,9 @@ Instruction *InstCombiner::foldSelectOpOp(SelectInst &SI, Instruction *TI,
Value *Op0 = MatchIsOpZero ? MatchOp : NewSI;
Value *Op1 = MatchIsOpZero ? NewSI : MatchOp;
if (auto *BO = dyn_cast<BinaryOperator>(TI)) {
return BinaryOperator::Create(BO->getOpcode(), Op0, Op1);
BinaryOperator *NewBO = BinaryOperator::Create(BO->getOpcode(), Op0, Op1);
NewBO->copyIRFlags(BO);
return NewBO;
}
if (auto *TGEP = dyn_cast<GetElementPtrInst>(TI)) {
auto *FGEP = cast<GetElementPtrInst>(FI);

2
llvm/test/Transforms/InstCombine/select_meta.ll
View File

@ -7,7 +7,7 @@ define i32 @foo(i32) local_unnamed_addr #0 {
; CHECK-LABEL: @foo(
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 %0, 2
; CHECK-NEXT: [[DOTV:%.*]] = select i1 [[TMP2]], i32 20, i32 -20, !prof ![[$MD1:[0-9]+]]
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[DOTV]], %0
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i32 [[DOTV]], %0
; CHECK-NEXT: ret i32 [[TMP3]]
;
%2 = icmp sgt i32 %0, 2

2
llvm/test/Transforms/LoopVectorize/reduction.ll
View File

@ -325,7 +325,7 @@ for.end: ; preds = %for.body, %entry
; We can vectorize conditional reductions with multi-input phis.
; CHECK: reduction_conditional
; CHECK: fadd <4 x float>
; CHECK: fadd fast <4 x float>
define float @reduction_conditional(float* %A, float* %B, float* %C, float %S) {
entry: