forked from OSchip/llvm-project
[SKX] Extended non-temporal load/store instructions for AVX512VL subsets.
Added avx512_movnt_vl multiclass for handling 256/128-bit forms of instruction. Added encoding and lowering tests. Reviewed by Elena Demikhovsky <elena.demikhovsky@intel.com> llvm-svn: 215536
This commit is contained in:
Robert Khasanov
parent
d97a634f12
commit
ed8829703f
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@ -1954,8 +1954,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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llvm_i32_ty], [IntrNoMem, Commutative]>;
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llvm_i32_ty], [IntrNoMem, Commutative]>;
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def int_x86_avx2_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa256">,
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def int_x86_avx2_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa256">,
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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Intrinsic<[llvm_v4i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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def int_x86_avx512_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa512">,
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Intrinsic<[llvm_v8i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -3219,6 +3217,8 @@ let TargetPrefix = "x86" in {
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Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_v8i64_ty,
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Intrinsic<[llvm_v8i64_ty], [llvm_v8i64_ty, llvm_v8i64_ty,
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llvm_v8i64_ty, llvm_i8_ty],
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llvm_v8i64_ty, llvm_i8_ty],
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[IntrNoMem]>;
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[IntrNoMem]>;
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def int_x86_avx512_movntdqa : GCCBuiltin<"__builtin_ia32_movntdqa512">,
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Intrinsic<[llvm_v8i64_ty], [llvm_ptr_ty], [IntrReadMem]>;
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}
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}
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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@ -2090,43 +2090,73 @@ def : Pat<(v8i64 (X86Vinsert undef, GR64:$src2, (iPTR 0))),
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// AVX-512 - Non-temporals
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// AVX-512 - Non-temporals
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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let SchedRW = [WriteLoad] in {
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def VMOVNTDQAZrm : AVX512PI<0x2A, MRMSrcMem, (outs VR512:$dst),
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(ins i512mem:$src), "vmovntdqa\t{$src, $dst|$dst, $src}",
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[(set VR512:$dst, (int_x86_avx512_movntdqa addr:$src))],
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SSEPackedInt>, EVEX, T8PD, EVEX_V512,
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EVEX_CD8<64, CD8VF>;
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def VMOVNTDQAZrm : AVX5128I<0x2A, MRMSrcMem, (outs VR512:$dst),
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let Predicates = [HasAVX512, HasVLX] in {
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(ins i512mem:$src),
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def VMOVNTDQAZ256rm : AVX512PI<0x2A, MRMSrcMem, (outs VR256X:$dst),
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"vmovntdqa\t{$src, $dst|$dst, $src}",
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(ins i256mem:$src),
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[(set VR512:$dst,
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"vmovntdqa\t{$src, $dst|$dst, $src}", [],
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(int_x86_avx512_movntdqa addr:$src))]>,
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SSEPackedInt>, EVEX, T8PD, EVEX_V256,
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EVEX, EVEX_V512, EVEX_CD8<64, CD8VF>;
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EVEX_CD8<64, CD8VF>;
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// Prefer non-temporal over temporal versions
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def VMOVNTDQAZ128rm : AVX512PI<0x2A, MRMSrcMem, (outs VR128X:$dst),
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let AddedComplexity = 400, SchedRW = [WriteStore] in {
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(ins i128mem:$src),
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"vmovntdqa\t{$src, $dst|$dst, $src}", [],
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def VMOVNTPSZmr : AVX512PSI<0x2B, MRMDestMem, (outs),
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SSEPackedInt>, EVEX, T8PD, EVEX_V128,
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(ins f512mem:$dst, VR512:$src),
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EVEX_CD8<64, CD8VF>;
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"vmovntps\t{$src, $dst|$dst, $src}",
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}
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[(alignednontemporalstore (v16f32 VR512:$src),
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addr:$dst)],
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IIC_SSE_MOVNT>,
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EVEX, EVEX_V512, EVEX_CD8<32, CD8VF>;
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def VMOVNTPDZmr : AVX512PDI<0x2B, MRMDestMem, (outs),
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(ins f512mem:$dst, VR512:$src),
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"vmovntpd\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v8f64 VR512:$src),
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addr:$dst)],
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IIC_SSE_MOVNT>,
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EVEX, EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
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def VMOVNTDQZmr : AVX512BI<0xE7, MRMDestMem, (outs),
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(ins i512mem:$dst, VR512:$src),
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"vmovntdq\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v8i64 VR512:$src),
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addr:$dst)],
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IIC_SSE_MOVNT>,
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EVEX, EVEX_V512, EVEX_CD8<64, CD8VF>;
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}
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}
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multiclass avx512_movnt<bits<8> opc, string OpcodeStr, PatFrag st_frag,
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ValueType OpVT, RegisterClass RC, X86MemOperand memop,
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Domain d, InstrItinClass itin = IIC_SSE_MOVNT> {
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let SchedRW = [WriteStore], mayStore = 1,
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AddedComplexity = 400 in
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def mr : AVX512PI<opc, MRMDestMem, (outs), (ins memop:$dst, RC:$src),
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!strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
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[(st_frag (OpVT RC:$src), addr:$dst)], d, itin>, EVEX;
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}
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multiclass avx512_movnt_vl<bits<8> opc, string OpcodeStr, PatFrag st_frag,
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string elty, string elsz, string vsz512,
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string vsz256, string vsz128, Domain d,
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Predicate prd, InstrItinClass itin = IIC_SSE_MOVNT> {
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let Predicates = [prd] in
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defm Z : avx512_movnt<opc, OpcodeStr, st_frag,
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!cast<ValueType>("v"##vsz512##elty##elsz), VR512,
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!cast<X86MemOperand>(elty##"512mem"), d, itin>,
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EVEX_V512;
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let Predicates = [prd, HasVLX] in {
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defm Z256 : avx512_movnt<opc, OpcodeStr, st_frag,
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!cast<ValueType>("v"##vsz256##elty##elsz), VR256X,
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!cast<X86MemOperand>(elty##"256mem"), d, itin>,
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EVEX_V256;
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defm Z128 : avx512_movnt<opc, OpcodeStr, st_frag,
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!cast<ValueType>("v"##vsz128##elty##elsz), VR128X,
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!cast<X86MemOperand>(elty##"128mem"), d, itin>,
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EVEX_V128;
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}
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}
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defm VMOVNTDQ : avx512_movnt_vl<0xE7, "vmovntdq", alignednontemporalstore,
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"i", "64", "8", "4", "2", SSEPackedInt,
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HasAVX512>, PD, EVEX_CD8<64, CD8VF>;
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defm VMOVNTPD : avx512_movnt_vl<0x2B, "vmovntpd", alignednontemporalstore,
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"f", "64", "8", "4", "2", SSEPackedDouble,
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HasAVX512>, PD, VEX_W, EVEX_CD8<64, CD8VF>;
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defm VMOVNTPS : avx512_movnt_vl<0x2B, "vmovntps", alignednontemporalstore,
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"f", "32", "16", "8", "4", SSEPackedSingle,
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HasAVX512>, PS, EVEX_CD8<32, CD8VF>;
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// AVX-512 - Integer arithmetic
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// AVX-512 - Integer arithmetic
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//
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//
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@ -727,6 +727,7 @@ def HasDQI : Predicate<"Subtarget->hasDQI()">;
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def HasBWI : Predicate<"Subtarget->hasBWI()">;
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def HasBWI : Predicate<"Subtarget->hasBWI()">;
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def HasVLX : Predicate<"Subtarget->hasVLX()">,
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def HasVLX : Predicate<"Subtarget->hasVLX()">,
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AssemblerPredicate<"FeatureVLX", "AVX-512 VLX ISA">;
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AssemblerPredicate<"FeatureVLX", "AVX-512 VLX ISA">;
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def NoVLX : Predicate<"!Subtarget->hasVLX()">;
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def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;
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def HasPOPCNT : Predicate<"Subtarget->hasPOPCNT()">;
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def HasAES : Predicate<"Subtarget->hasAES()">;
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def HasAES : Predicate<"Subtarget->hasAES()">;
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@ -3697,6 +3697,7 @@ let Predicates = [UseSSE1] in {
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let AddedComplexity = 400 in { // Prefer non-temporal versions
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let AddedComplexity = 400 in { // Prefer non-temporal versions
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let SchedRW = [WriteStore] in {
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let SchedRW = [WriteStore] in {
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let Predicates = [HasAVX, NoVLX] in {
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def VMOVNTPSmr : VPSI<0x2B, MRMDestMem, (outs),
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def VMOVNTPSmr : VPSI<0x2B, MRMDestMem, (outs),
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(ins f128mem:$dst, VR128:$src),
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(ins f128mem:$dst, VR128:$src),
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"movntps\t{$src, $dst|$dst, $src}",
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"movntps\t{$src, $dst|$dst, $src}",
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@ -3737,6 +3738,7 @@ def VMOVNTDQYmr : VPDI<0xE7, MRMDestMem, (outs),
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[(alignednontemporalstore (v4i64 VR256:$src),
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[(alignednontemporalstore (v4i64 VR256:$src),
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addr:$dst)],
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addr:$dst)],
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IIC_SSE_MOVNT>, VEX, VEX_L;
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IIC_SSE_MOVNT>, VEX, VEX_L;
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}
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def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntps\t{$src, $dst|$dst, $src}",
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"movntps\t{$src, $dst|$dst, $src}",
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@ -0,0 +1,34 @@
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; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s
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define void @f256(<8 x float> %A, <8 x float> %AA, i8* %B, <4 x double> %C, <4 x double> %CC, i32 %D, <4 x i64> %E, <4 x i64> %EE) {
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; CHECK: vmovntps %ymm{{.*}} ## encoding: [0x62
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%cast = bitcast i8* %B to <8 x float>*
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%A2 = fadd <8 x float> %A, %AA
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store <8 x float> %A2, <8 x float>* %cast, align 64, !nontemporal !0
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; CHECK: vmovntdq %ymm{{.*}} ## encoding: [0x62
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%cast1 = bitcast i8* %B to <4 x i64>*
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%E2 = add <4 x i64> %E, %EE
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store <4 x i64> %E2, <4 x i64>* %cast1, align 64, !nontemporal !0
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; CHECK: vmovntpd %ymm{{.*}} ## encoding: [0x62
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%cast2 = bitcast i8* %B to <4 x double>*
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%C2 = fadd <4 x double> %C, %CC
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store <4 x double> %C2, <4 x double>* %cast2, align 64, !nontemporal !0
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ret void
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}
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define void @f128(<4 x float> %A, <4 x float> %AA, i8* %B, <2 x double> %C, <2 x double> %CC, i32 %D, <2 x i64> %E, <2 x i64> %EE) {
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; CHECK: vmovntps %xmm{{.*}} ## encoding: [0x62
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%cast = bitcast i8* %B to <4 x float>*
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%A2 = fadd <4 x float> %A, %AA
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store <4 x float> %A2, <4 x float>* %cast, align 64, !nontemporal !0
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; CHECK: vmovntdq %xmm{{.*}} ## encoding: [0x62
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%cast1 = bitcast i8* %B to <2 x i64>*
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%E2 = add <2 x i64> %E, %EE
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store <2 x i64> %E2, <2 x i64>* %cast1, align 64, !nontemporal !0
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; CHECK: vmovntpd %xmm{{.*}} ## encoding: [0x62
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%cast2 = bitcast i8* %B to <2 x double>*
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%C2 = fadd <2 x double> %C, %CC
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store <2 x double> %C2, <2 x double>* %cast2, align 64, !nontemporal !0
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ret void
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}
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!0 = metadata !{i32 1}
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@ -665,6 +665,102 @@
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// CHECK: encoding: [0x62,0xf1,0xfe,0x48,0x6f,0xb2,0xc0,0xdf,0xff,0xff]
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// CHECK: encoding: [0x62,0xf1,0xfe,0x48,0x6f,0xb2,0xc0,0xdf,0xff,0xff]
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vmovdqu64 -8256(%rdx), %zmm6
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vmovdqu64 -8256(%rdx), %zmm6
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// CHECK: vmovntdq %zmm24, (%rcx)
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// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x01]
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vmovntdq %zmm24, (%rcx)
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// CHECK: vmovntdq %zmm24, 291(%rax,%r14,8)
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// CHECK: encoding: [0x62,0x21,0x7d,0x48,0xe7,0x84,0xf0,0x23,0x01,0x00,0x00]
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vmovntdq %zmm24, 291(%rax,%r14,8)
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// CHECK: vmovntdq %zmm24, 8128(%rdx)
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// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x42,0x7f]
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vmovntdq %zmm24, 8128(%rdx)
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// CHECK: vmovntdq %zmm24, 8192(%rdx)
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// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x82,0x00,0x20,0x00,0x00]
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vmovntdq %zmm24, 8192(%rdx)
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// CHECK: vmovntdq %zmm24, -8192(%rdx)
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// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x42,0x80]
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vmovntdq %zmm24, -8192(%rdx)
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// CHECK: vmovntdq %zmm24, -8256(%rdx)
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// CHECK: encoding: [0x62,0x61,0x7d,0x48,0xe7,0x82,0xc0,0xdf,0xff,0xff]
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vmovntdq %zmm24, -8256(%rdx)
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// CHECK: vmovntdqa (%rcx), %zmm17
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// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x09]
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vmovntdqa (%rcx), %zmm17
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// CHECK: vmovntdqa 291(%rax,%r14,8), %zmm17
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// CHECK: encoding: [0x62,0xa2,0x7d,0x48,0x2a,0x8c,0xf0,0x23,0x01,0x00,0x00]
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vmovntdqa 291(%rax,%r14,8), %zmm17
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// CHECK: vmovntdqa 8128(%rdx), %zmm17
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// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x4a,0x7f]
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vmovntdqa 8128(%rdx), %zmm17
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// CHECK: vmovntdqa 8192(%rdx), %zmm17
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// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x8a,0x00,0x20,0x00,0x00]
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vmovntdqa 8192(%rdx), %zmm17
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// CHECK: vmovntdqa -8192(%rdx), %zmm17
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// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x4a,0x80]
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vmovntdqa -8192(%rdx), %zmm17
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// CHECK: vmovntdqa -8256(%rdx), %zmm17
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// CHECK: encoding: [0x62,0xe2,0x7d,0x48,0x2a,0x8a,0xc0,0xdf,0xff,0xff]
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vmovntdqa -8256(%rdx), %zmm17
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// CHECK: vmovntpd %zmm17, (%rcx)
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// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x09]
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vmovntpd %zmm17, (%rcx)
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// CHECK: vmovntpd %zmm17, 291(%rax,%r14,8)
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// CHECK: encoding: [0x62,0xa1,0xfd,0x48,0x2b,0x8c,0xf0,0x23,0x01,0x00,0x00]
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vmovntpd %zmm17, 291(%rax,%r14,8)
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// CHECK: vmovntpd %zmm17, 8128(%rdx)
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// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x4a,0x7f]
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vmovntpd %zmm17, 8128(%rdx)
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// CHECK: vmovntpd %zmm17, 8192(%rdx)
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// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x8a,0x00,0x20,0x00,0x00]
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vmovntpd %zmm17, 8192(%rdx)
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// CHECK: vmovntpd %zmm17, -8192(%rdx)
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// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x4a,0x80]
|
||||||
|
vmovntpd %zmm17, -8192(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %zmm17, -8256(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0xfd,0x48,0x2b,0x8a,0xc0,0xdf,0xff,0xff]
|
||||||
|
vmovntpd %zmm17, -8256(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %zmm5, (%rcx)
|
||||||
|
// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x29]
|
||||||
|
vmovntps %zmm5, (%rcx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %zmm5, 291(%rax,%r14,8)
|
||||||
|
// CHECK: encoding: [0x62,0xb1,0x7c,0x48,0x2b,0xac,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntps %zmm5, 291(%rax,%r14,8)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %zmm5, 8128(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x6a,0x7f]
|
||||||
|
vmovntps %zmm5, 8128(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %zmm5, 8192(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0xaa,0x00,0x20,0x00,0x00]
|
||||||
|
vmovntps %zmm5, 8192(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %zmm5, -8192(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0x6a,0x80]
|
||||||
|
vmovntps %zmm5, -8192(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %zmm5, -8256(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xf1,0x7c,0x48,0x2b,0xaa,0xc0,0xdf,0xff,0xff]
|
||||||
|
vmovntps %zmm5, -8256(%rdx)
|
||||||
|
|
||||||
// CHECK: vmovupd %zmm9, %zmm27
|
// CHECK: vmovupd %zmm9, %zmm27
|
||||||
// CHECK: encoding: [0x62,0x41,0xfd,0x48,0x10,0xd9]
|
// CHECK: encoding: [0x62,0x41,0xfd,0x48,0x10,0xd9]
|
||||||
vmovupd %zmm9, %zmm27
|
vmovupd %zmm9, %zmm27
|
||||||
|
|
|
||||||
|
|
@ -432,6 +432,198 @@
|
||||||
// CHECK: encoding: [0x62,0x61,0xfe,0x28,0x6f,0xaa,0xe0,0xef,0xff,0xff]
|
// CHECK: encoding: [0x62,0x61,0xfe,0x28,0x6f,0xaa,0xe0,0xef,0xff,0xff]
|
||||||
vmovdqu64 -4128(%rdx), %ymm29
|
vmovdqu64 -4128(%rdx), %ymm29
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %xmm22, (%rcx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0x31]
|
||||||
|
vmovntdq %xmm22, (%rcx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %xmm22, 291(%rax,%r14,8)
|
||||||
|
// CHECK: encoding: [0x62,0xa1,0x7d,0x08,0xe7,0xb4,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntdq %xmm22, 291(%rax,%r14,8)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %xmm22, 2032(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0x72,0x7f]
|
||||||
|
vmovntdq %xmm22, 2032(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %xmm22, 2048(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0xb2,0x00,0x08,0x00,0x00]
|
||||||
|
vmovntdq %xmm22, 2048(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %xmm22, -2048(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0x72,0x80]
|
||||||
|
vmovntdq %xmm22, -2048(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %xmm22, -2064(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x08,0xe7,0xb2,0xf0,0xf7,0xff,0xff]
|
||||||
|
vmovntdq %xmm22, -2064(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %ymm19, (%rcx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x19]
|
||||||
|
vmovntdq %ymm19, (%rcx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %ymm19, 291(%rax,%r14,8)
|
||||||
|
// CHECK: encoding: [0x62,0xa1,0x7d,0x28,0xe7,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntdq %ymm19, 291(%rax,%r14,8)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %ymm19, 4064(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x5a,0x7f]
|
||||||
|
vmovntdq %ymm19, 4064(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %ymm19, 4096(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x9a,0x00,0x10,0x00,0x00]
|
||||||
|
vmovntdq %ymm19, 4096(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %ymm19, -4096(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x5a,0x80]
|
||||||
|
vmovntdq %ymm19, -4096(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdq %ymm19, -4128(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0x7d,0x28,0xe7,0x9a,0xe0,0xef,0xff,0xff]
|
||||||
|
vmovntdq %ymm19, -4128(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa (%rcx), %xmm24
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x01]
|
||||||
|
vmovntdqa (%rcx), %xmm24
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa 291(%rax,%r14,8), %xmm24
|
||||||
|
// CHECK: encoding: [0x62,0x22,0x7d,0x08,0x2a,0x84,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntdqa 291(%rax,%r14,8), %xmm24
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa 2032(%rdx), %xmm24
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x42,0x7f]
|
||||||
|
vmovntdqa 2032(%rdx), %xmm24
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa 2048(%rdx), %xmm24
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x82,0x00,0x08,0x00,0x00]
|
||||||
|
vmovntdqa 2048(%rdx), %xmm24
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa -2048(%rdx), %xmm24
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x42,0x80]
|
||||||
|
vmovntdqa -2048(%rdx), %xmm24
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa -2064(%rdx), %xmm24
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x08,0x2a,0x82,0xf0,0xf7,0xff,0xff]
|
||||||
|
vmovntdqa -2064(%rdx), %xmm24
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa (%rcx), %ymm28
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0x21]
|
||||||
|
vmovntdqa (%rcx), %ymm28
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa 291(%rax,%r14,8), %ymm28
|
||||||
|
// CHECK: encoding: [0x62,0x22,0x7d,0x28,0x2a,0xa4,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntdqa 291(%rax,%r14,8), %ymm28
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa 4064(%rdx), %ymm28
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0x62,0x7f]
|
||||||
|
vmovntdqa 4064(%rdx), %ymm28
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa 4096(%rdx), %ymm28
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0xa2,0x00,0x10,0x00,0x00]
|
||||||
|
vmovntdqa 4096(%rdx), %ymm28
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa -4096(%rdx), %ymm28
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0x62,0x80]
|
||||||
|
vmovntdqa -4096(%rdx), %ymm28
|
||||||
|
|
||||||
|
// CHECK: vmovntdqa -4128(%rdx), %ymm28
|
||||||
|
// CHECK: encoding: [0x62,0x62,0x7d,0x28,0x2a,0xa2,0xe0,0xef,0xff,0xff]
|
||||||
|
vmovntdqa -4128(%rdx), %ymm28
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %xmm17, (%rcx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x09]
|
||||||
|
vmovntpd %xmm17, (%rcx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %xmm17, 291(%rax,%r14,8)
|
||||||
|
// CHECK: encoding: [0x62,0xa1,0xfd,0x08,0x2b,0x8c,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntpd %xmm17, 291(%rax,%r14,8)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %xmm17, 2032(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x4a,0x7f]
|
||||||
|
vmovntpd %xmm17, 2032(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %xmm17, 2048(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x8a,0x00,0x08,0x00,0x00]
|
||||||
|
vmovntpd %xmm17, 2048(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %xmm17, -2048(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x4a,0x80]
|
||||||
|
vmovntpd %xmm17, -2048(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %xmm17, -2064(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0xe1,0xfd,0x08,0x2b,0x8a,0xf0,0xf7,0xff,0xff]
|
||||||
|
vmovntpd %xmm17, -2064(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %ymm27, (%rcx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x19]
|
||||||
|
vmovntpd %ymm27, (%rcx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %ymm27, 291(%rax,%r14,8)
|
||||||
|
// CHECK: encoding: [0x62,0x21,0xfd,0x28,0x2b,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntpd %ymm27, 291(%rax,%r14,8)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %ymm27, 4064(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x5a,0x7f]
|
||||||
|
vmovntpd %ymm27, 4064(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %ymm27, 4096(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x9a,0x00,0x10,0x00,0x00]
|
||||||
|
vmovntpd %ymm27, 4096(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %ymm27, -4096(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x5a,0x80]
|
||||||
|
vmovntpd %ymm27, -4096(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntpd %ymm27, -4128(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0xfd,0x28,0x2b,0x9a,0xe0,0xef,0xff,0xff]
|
||||||
|
vmovntpd %ymm27, -4128(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %xmm26, (%rcx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x11]
|
||||||
|
vmovntps %xmm26, (%rcx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %xmm26, 291(%rax,%r14,8)
|
||||||
|
// CHECK: encoding: [0x62,0x21,0x7c,0x08,0x2b,0x94,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntps %xmm26, 291(%rax,%r14,8)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %xmm26, 2032(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x52,0x7f]
|
||||||
|
vmovntps %xmm26, 2032(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %xmm26, 2048(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x92,0x00,0x08,0x00,0x00]
|
||||||
|
vmovntps %xmm26, 2048(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %xmm26, -2048(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x52,0x80]
|
||||||
|
vmovntps %xmm26, -2048(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %xmm26, -2064(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x08,0x2b,0x92,0xf0,0xf7,0xff,0xff]
|
||||||
|
vmovntps %xmm26, -2064(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %ymm28, (%rcx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0x21]
|
||||||
|
vmovntps %ymm28, (%rcx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %ymm28, 291(%rax,%r14,8)
|
||||||
|
// CHECK: encoding: [0x62,0x21,0x7c,0x28,0x2b,0xa4,0xf0,0x23,0x01,0x00,0x00]
|
||||||
|
vmovntps %ymm28, 291(%rax,%r14,8)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %ymm28, 4064(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0x62,0x7f]
|
||||||
|
vmovntps %ymm28, 4064(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %ymm28, 4096(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0xa2,0x00,0x10,0x00,0x00]
|
||||||
|
vmovntps %ymm28, 4096(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %ymm28, -4096(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0x62,0x80]
|
||||||
|
vmovntps %ymm28, -4096(%rdx)
|
||||||
|
|
||||||
|
// CHECK: vmovntps %ymm28, -4128(%rdx)
|
||||||
|
// CHECK: encoding: [0x62,0x61,0x7c,0x28,0x2b,0xa2,0xe0,0xef,0xff,0xff]
|
||||||
|
vmovntps %ymm28, -4128(%rdx)
|
||||||
|
|
||||||
// CHECK: vmovupd %xmm22, %xmm24
|
// CHECK: vmovupd %xmm22, %xmm24
|
||||||
// CHECK: encoding: [0x62,0x21,0xfd,0x08,0x10,0xc6]
|
// CHECK: encoding: [0x62,0x21,0xfd,0x08,0x10,0xc6]
|
||||||
vmovupd %xmm22, %xmm24
|
vmovupd %xmm22, %xmm24
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue