forked from OSchip/llvm-project
[InstCombine] add test for possible shuffle fold; NFC
llvm-svn: 344860
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3117b17bc5
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ed3da32142
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@ -3,7 +3,7 @@
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define <1 x i8> @test1(<8 x i8> %in) {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: [[VEC:%.*]] = shufflevector <8 x i8> %in, <8 x i8> undef, <1 x i32> <i32 5>
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; CHECK-NEXT: [[VEC:%.*]] = shufflevector <8 x i8> [[IN:%.*]], <8 x i8> undef, <1 x i32> <i32 5>
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; CHECK-NEXT: ret <1 x i8> [[VEC]]
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;
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%val = extractelement <8 x i8> %in, i32 5
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@ -13,7 +13,7 @@ define <1 x i8> @test1(<8 x i8> %in) {
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define <4 x i16> @test2(<8 x i16> %in, <8 x i16> %in2) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: [[VEC_3:%.*]] = shufflevector <8 x i16> %in2, <8 x i16> %in, <4 x i32> <i32 11, i32 9, i32 0, i32 10>
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; CHECK-NEXT: [[VEC_3:%.*]] = shufflevector <8 x i16> [[IN2:%.*]], <8 x i16> [[IN:%.*]], <4 x i32> <i32 11, i32 9, i32 0, i32 10>
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; CHECK-NEXT: ret <4 x i16> [[VEC_3]]
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;
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%elt0 = extractelement <8 x i16> %in, i32 3
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@ -31,8 +31,8 @@ define <4 x i16> @test2(<8 x i16> %in, <8 x i16> %in2) {
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define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
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; CHECK-LABEL: @test_vcopyq_lane_p64(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i64> %b, <1 x i64> undef, <2 x i32> <i32 0, i32 undef>
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; CHECK-NEXT: [[RES:%.*]] = shufflevector <2 x i64> %a, <2 x i64> [[TMP1]], <2 x i32> <i32 0, i32 2>
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i64> [[B:%.*]], <1 x i64> undef, <2 x i32> <i32 0, i32 undef>
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; CHECK-NEXT: [[RES:%.*]] = shufflevector <2 x i64> [[A:%.*]], <2 x i64> [[TMP1]], <2 x i32> <i32 0, i32 2>
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; CHECK-NEXT: ret <2 x i64> [[RES]]
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;
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%elt = extractelement <1 x i64> %b, i32 0
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@ -44,8 +44,8 @@ define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
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define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
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; CHECK-LABEL: @widen_extract2(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> %ext, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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; CHECK-NEXT: [[I2:%.*]] = shufflevector <4 x float> %ins, <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 4, i32 2, i32 5>
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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; CHECK-NEXT: [[I2:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 4, i32 2, i32 5>
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; CHECK-NEXT: ret <4 x float> [[I2]]
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;
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%e1 = extractelement <2 x float> %ext, i32 0
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@ -57,8 +57,8 @@ define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
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define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
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; CHECK-LABEL: @widen_extract3(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> %ext, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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; CHECK-NEXT: [[I3:%.*]] = shufflevector <4 x float> %ins, <4 x float> [[TMP1]], <4 x i32> <i32 6, i32 5, i32 4, i32 3>
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> [[EXT:%.*]], <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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; CHECK-NEXT: [[I3:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 6, i32 5, i32 4, i32 3>
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; CHECK-NEXT: ret <4 x float> [[I3]]
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;
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%e1 = extractelement <3 x float> %ext, i32 0
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@ -72,8 +72,8 @@ define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
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define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
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; CHECK-LABEL: @widen_extract4(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> %ext, <2 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[I1:%.*]] = shufflevector <8 x float> %ins, <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[I1:%.*]] = shufflevector <8 x float> [[INS:%.*]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-NEXT: ret <8 x float> [[I1]]
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;
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%e1 = extractelement <2 x float> %ext, i32 0
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@ -86,7 +86,7 @@ define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
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define <8 x i16> @pr26015(<4 x i16> %t0) {
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; CHECK-LABEL: @pr26015(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> %t0, <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0:%.*]], <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> <i16 0, i16 0, i16 0, i16 undef, i16 0, i16 0, i16 0, i16 undef>, <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 10, i32 4, i32 5, i32 6, i32 11>
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; CHECK-NEXT: ret <8 x i16> [[T5]]
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;
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@ -103,10 +103,10 @@ define <8 x i16> @pr26015(<4 x i16> %t0) {
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define <8 x i16> @pr25999(<4 x i16> %t0, i1 %b) {
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; CHECK-LABEL: @pr25999(
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; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> %t0, i32 2
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; CHECK-NEXT: br i1 %b, label %if, label %end
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; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i32 2
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; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]]
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; CHECK: if:
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> %t0, <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0]], <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 undef, i16 0, i16 0, i16 0, i16 undef>, i16 [[T1]], i32 3
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; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
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; CHECK-NEXT: ret <8 x i16> [[T5]]
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@ -137,13 +137,13 @@ end:
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define <4 x double> @pr25999_phis1(i1 %c, <2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @pr25999_phis1(
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; CHECK-NEXT: bb1:
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; CHECK-NEXT: br i1 %c, label %bb2, label %bb3
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: [[R:%.*]] = call <2 x double> @dummy(<2 x double> %a)
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; CHECK-NEXT: br label %bb3
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; CHECK-NEXT: [[R:%.*]] = call <2 x double> @dummy(<2 x double> [[A:%.*]])
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ %a, %bb1 ], [ [[R]], %bb2 ]
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; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ %b, %bb1 ], [ zeroinitializer, %bb2 ]
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; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
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; CHECK-NEXT: ret <4 x double> [[TMP4]]
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@ -168,13 +168,13 @@ declare <2 x double> @dummy(<2 x double>)
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define <4 x double> @pr25999_phis2(i1 %c, <2 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: @pr25999_phis2(
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; CHECK-NEXT: bb1:
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; CHECK-NEXT: br i1 %c, label %bb2, label %bb3
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; CHECK-NEXT: br i1 [[C:%.*]], label [[BB2:%.*]], label [[BB3:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: [[R:%.*]] = call <2 x double> @dummy(<2 x double> %a)
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; CHECK-NEXT: br label %bb3
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; CHECK-NEXT: [[R:%.*]] = call <2 x double> @dummy(<2 x double> [[A:%.*]])
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; CHECK-NEXT: br label [[BB3]]
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; CHECK: bb3:
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; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ %a, %bb1 ], [ [[R]], %bb2 ]
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; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ %b, %bb1 ], [ zeroinitializer, %bb2 ]
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; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
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; CHECK-NEXT: [[D:%.*]] = fadd <2 x double> [[TMP1]], [[TMP1]]
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; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[D]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
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; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
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@ -202,15 +202,15 @@ bb3:
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define double @pr26354(<2 x double>* %tmp, i1 %B) {
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; CHECK-LABEL: @pr26354(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[LD:%.*]] = load <2 x double>, <2 x double>* %tmp, align 16
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; CHECK-NEXT: [[LD:%.*]] = load <2 x double>, <2 x double>* [[TMP:%.*]], align 16
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; CHECK-NEXT: [[E1:%.*]] = extractelement <2 x double> [[LD]], i32 0
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; CHECK-NEXT: br i1 %B, label %if, label %end
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; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]]
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; CHECK: if:
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; CHECK-NEXT: [[E2:%.*]] = extractelement <2 x double> [[LD]], i32 1
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; CHECK-NEXT: [[I1:%.*]] = insertelement <4 x double> <double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double undef>, double [[E2]], i32 3
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; CHECK-NEXT: br label %end
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; CHECK-NEXT: br label [[END]]
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; CHECK: end:
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; CHECK-NEXT: [[PH:%.*]] = phi <4 x double> [ undef, %entry ], [ [[I1]], %if ]
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; CHECK-NEXT: [[PH:%.*]] = phi <4 x double> [ undef, [[ENTRY:%.*]] ], [ [[I1]], [[IF]] ]
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; CHECK-NEXT: [[E3:%.*]] = extractelement <4 x double> [[PH]], i32 1
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; CHECK-NEXT: [[MU:%.*]] = fmul double [[E1]], [[E3]]
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; CHECK-NEXT: ret double [[MU]]
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@ -239,11 +239,11 @@ end:
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define <4 x float> @PR30923(<2 x float> %x) {
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; CHECK-LABEL: @PR30923(
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; CHECK-NEXT: bb1:
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; CHECK-NEXT: [[EXT1:%.*]] = extractelement <2 x float> %x, i32 1
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; CHECK-NEXT: [[EXT1:%.*]] = extractelement <2 x float> [[X:%.*]], i32 1
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; CHECK-NEXT: store float [[EXT1]], float* undef, align 4
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; CHECK-NEXT: br label %bb2
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; CHECK-NEXT: br label [[BB2:%.*]]
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; CHECK: bb2:
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; CHECK-NEXT: [[EXT2:%.*]] = extractelement <2 x float> %x, i32 0
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; CHECK-NEXT: [[EXT2:%.*]] = extractelement <2 x float> [[X]], i32 0
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; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> <float 0.000000e+00, float 0.000000e+00, float undef, float undef>, float [[EXT2]], i32 2
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; CHECK-NEXT: [[INS2:%.*]] = insertelement <4 x float> [[INS1]], float [[EXT1]], i32 3
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; CHECK-NEXT: ret <4 x float> [[INS2]]
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@ -283,3 +283,23 @@ entry:
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%ret = select i1 %e, <4 x i32> %b, <4 x i32> zeroinitializer
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ret <4 x i32> %ret
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}
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; PR34724: https://bugs.llvm.org/show_bug.cgi?id=34724
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define <4 x float> @collectShuffleElts(<2 x float> %x, float %y) {
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; CHECK-LABEL: @collectShuffleElts(
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; CHECK-NEXT: [[X0:%.*]] = extractelement <2 x float> [[X:%.*]], i32 0
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; CHECK-NEXT: [[X1:%.*]] = extractelement <2 x float> [[X]], i32 1
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; CHECK-NEXT: [[V1:%.*]] = insertelement <4 x float> undef, float [[X0]], i32 1
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; CHECK-NEXT: [[V2:%.*]] = insertelement <4 x float> [[V1]], float [[X1]], i32 2
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; CHECK-NEXT: [[V3:%.*]] = insertelement <4 x float> [[V2]], float [[Y:%.*]], i32 3
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; CHECK-NEXT: ret <4 x float> [[V3]]
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;
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%x0 = extractelement <2 x float> %x, i32 0
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%x1 = extractelement <2 x float> %x, i32 1
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%v1 = insertelement <4 x float> undef, float %x0, i32 1
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%v2 = insertelement <4 x float> %v1, float %x1, i32 2
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%v3 = insertelement <4 x float> %v2, float %y, i32 3
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ret <4 x float> %v3
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}
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