forked from OSchip/llvm-project
[ARM] Convert more invalid NEON immediate loads
Summary: Currently the LLVM MC assembler is able to convert e.g. vmov.i32 d0, #0xabababab (which is technically invalid) into a valid instruction vmov.i8 d0, #0xab this patch adds support for vmov.i64 and for cases with the resulting load types other than i8, e.g.: vmov.i32 d0, #0xab00ab00 -> vmov.i16 d0, #0xab00 Reviewers: olista01, rengolin Reviewed By: rengolin Subscribers: rengolin, javed.absar, kristof.beyls, rogfer01, llvm-commits Differential Revision: https://reviews.llvm.org/D44467 llvm-svn: 327709
This commit is contained in:
Mikhail Maltsev
parent
ce00978b10
commit
ed1c8bfec2
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@ -48,46 +48,28 @@ def nImmVMOVI32 : Operand<i32> {
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let ParserMatchClass = nImmVMOVI32AsmOperand;
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}
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def nImmVMOVI16AsmOperandByteReplicate :
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AsmOperandClass {
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let Name = "NEONi16vmovByteReplicate";
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let PredicateMethod = "isNEONi16ByteReplicate";
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let RenderMethod = "addNEONvmovByteReplicateOperands";
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}
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def nImmVMOVI32AsmOperandByteReplicate :
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AsmOperandClass {
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let Name = "NEONi32vmovByteReplicate";
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let PredicateMethod = "isNEONi32ByteReplicate";
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let RenderMethod = "addNEONvmovByteReplicateOperands";
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}
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def nImmVMVNI16AsmOperandByteReplicate :
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AsmOperandClass {
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let Name = "NEONi16invByteReplicate";
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let PredicateMethod = "isNEONi16ByteReplicate";
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let RenderMethod = "addNEONinvByteReplicateOperands";
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}
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def nImmVMVNI32AsmOperandByteReplicate :
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AsmOperandClass {
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let Name = "NEONi32invByteReplicate";
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let PredicateMethod = "isNEONi32ByteReplicate";
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let RenderMethod = "addNEONinvByteReplicateOperands";
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class nImmVMOVIAsmOperandReplicate<ValueType From, ValueType To>
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: AsmOperandClass {
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let Name = "NEONi" # To.Size # "vmovi" # From.Size # "Replicate";
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let PredicateMethod = "isNEONmovReplicate<" # From.Size # ", " # To.Size # ">";
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let RenderMethod = "addNEONvmovi" # From.Size # "ReplicateOperands";
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}
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def nImmVMOVI16ByteReplicate : Operand<i32> {
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let PrintMethod = "printNEONModImmOperand";
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let ParserMatchClass = nImmVMOVI16AsmOperandByteReplicate;
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class nImmVINVIAsmOperandReplicate<ValueType From, ValueType To>
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: AsmOperandClass {
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let Name = "NEONi" # To.Size # "invi" # From.Size # "Replicate";
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let PredicateMethod = "isNEONinvReplicate<" # From.Size # ", " # To.Size # ">";
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let RenderMethod = "addNEONinvi" # From.Size # "ReplicateOperands";
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}
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def nImmVMOVI32ByteReplicate : Operand<i32> {
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class nImmVMOVIReplicate<ValueType From, ValueType To> : Operand<i32> {
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let PrintMethod = "printNEONModImmOperand";
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let ParserMatchClass = nImmVMOVI32AsmOperandByteReplicate;
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let ParserMatchClass = nImmVMOVIAsmOperandReplicate<From, To>;
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}
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def nImmVMVNI16ByteReplicate : Operand<i32> {
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class nImmVINVIReplicate<ValueType From, ValueType To> : Operand<i32> {
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let PrintMethod = "printNEONModImmOperand";
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let ParserMatchClass = nImmVMVNI16AsmOperandByteReplicate;
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}
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def nImmVMVNI32ByteReplicate : Operand<i32> {
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let PrintMethod = "printNEONModImmOperand";
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let ParserMatchClass = nImmVMVNI32AsmOperandByteReplicate;
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let ParserMatchClass = nImmVINVIAsmOperandReplicate<From, To>;
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}
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def nImmVMOVI32NegAsmOperand : AsmOperandClass { let Name = "NEONi32vmovNeg"; }
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@ -5933,34 +5915,57 @@ def VMOVv4f32 : N1ModImm<1, 0b000, 0b1111, 0, 1, 0, 1, (outs QPR:$Vd),
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} // isReMaterializable, isAsCheapAsAMove
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// Add support for bytes replication feature, so it could be GAS compatible.
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// E.g. instructions below:
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// "vmov.i32 d0, 0xffffffff"
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// "vmov.i32 d0, 0xabababab"
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// "vmov.i16 d0, 0xabab"
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// are incorrect, but we could deal with such cases.
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// For last two instructions, for example, it should emit:
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// "vmov.i8 d0, 0xab"
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def : NEONInstAlias<"vmov${p}.i16 $Vd, $Vm",
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(VMOVv8i8 DPR:$Vd, nImmVMOVI16ByteReplicate:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmov${p}.i32 $Vd, $Vm",
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(VMOVv8i8 DPR:$Vd, nImmVMOVI32ByteReplicate:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmov${p}.i16 $Vd, $Vm",
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(VMOVv16i8 QPR:$Vd, nImmVMOVI16ByteReplicate:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmov${p}.i32 $Vd, $Vm",
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(VMOVv16i8 QPR:$Vd, nImmVMOVI32ByteReplicate:$Vm, pred:$p)>;
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multiclass NEONImmReplicateI8InstAlias<ValueType To> {
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// E.g. instructions below:
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// "vmov.i32 d0, #0xffffffff"
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// "vmov.i32 d0, #0xabababab"
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// "vmov.i16 d0, #0xabab"
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// are incorrect, but we could deal with such cases.
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// For last two instructions, for example, it should emit:
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// "vmov.i8 d0, #0xab"
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def : NEONInstAlias<"vmov${p}.i" # To.Size # " $Vd, $Vm",
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(VMOVv8i8 DPR:$Vd, nImmVMOVIReplicate<i8, To>:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmov${p}.i" # To.Size # " $Vd, $Vm",
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(VMOVv16i8 QPR:$Vd, nImmVMOVIReplicate<i8, To>:$Vm, pred:$p)>;
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// Also add same support for VMVN instructions. So instruction:
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// "vmvn.i32 d0, #0xabababab"
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// actually means:
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// "vmov.i8 d0, #0x54"
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def : NEONInstAlias<"vmvn${p}.i" # To.Size # " $Vd, $Vm",
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(VMOVv8i8 DPR:$Vd, nImmVINVIReplicate<i8, To>:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmvn${p}.i" # To.Size # " $Vd, $Vm",
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(VMOVv16i8 QPR:$Vd, nImmVINVIReplicate<i8, To>:$Vm, pred:$p)>;
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}
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// Also add same support for VMVN instructions. So instruction:
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// "vmvn.i32 d0, 0xabababab"
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// actually means:
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// "vmov.i8 d0, 0x54"
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def : NEONInstAlias<"vmvn${p}.i16 $Vd, $Vm",
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(VMOVv8i8 DPR:$Vd, nImmVMVNI16ByteReplicate:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmvn${p}.i32 $Vd, $Vm",
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(VMOVv8i8 DPR:$Vd, nImmVMVNI32ByteReplicate:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmvn${p}.i16 $Vd, $Vm",
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(VMOVv16i8 QPR:$Vd, nImmVMVNI16ByteReplicate:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmvn${p}.i32 $Vd, $Vm",
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(VMOVv16i8 QPR:$Vd, nImmVMVNI32ByteReplicate:$Vm, pred:$p)>;
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defm : NEONImmReplicateI8InstAlias<i16>;
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defm : NEONImmReplicateI8InstAlias<i32>;
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defm : NEONImmReplicateI8InstAlias<i64>;
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// Similar to above for types other than i8, e.g.:
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// "vmov.i32 d0, #0xab00ab00" -> "vmov.i16 d0, #0xab00"
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// "vmvn.i64 q0, #0xab000000ab000000" -> "vmvn.i32 q0, #0xab000000"
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// In this case we do not canonicalize VMVN to VMOV
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multiclass NEONImmReplicateInstAlias<ValueType From, NeonI V8, NeonI V16,
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NeonI NV8, NeonI NV16, ValueType To> {
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def : NEONInstAlias<"vmov${p}.i" # To.Size # " $Vd, $Vm",
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(V8 DPR:$Vd, nImmVMOVIReplicate<From, To>:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmov${p}.i" # To.Size # " $Vd, $Vm",
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(V16 QPR:$Vd, nImmVMOVIReplicate<From, To>:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmvn${p}.i" # To.Size # " $Vd, $Vm",
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(NV8 DPR:$Vd, nImmVMOVIReplicate<From, To>:$Vm, pred:$p)>;
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def : NEONInstAlias<"vmvn${p}.i" # To.Size # " $Vd, $Vm",
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(NV16 QPR:$Vd, nImmVMOVIReplicate<From, To>:$Vm, pred:$p)>;
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}
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defm : NEONImmReplicateInstAlias<i16, VMOVv4i16, VMOVv8i16,
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VMVNv4i16, VMVNv8i16, i32>;
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defm : NEONImmReplicateInstAlias<i16, VMOVv4i16, VMOVv8i16,
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VMVNv4i16, VMVNv8i16, i64>;
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defm : NEONImmReplicateInstAlias<i32, VMOVv2i32, VMOVv4i32,
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VMVNv2i32, VMVNv4i32, i64>;
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// TODO: add "VMOV <-> VMVN" conversion for cases like
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// "vmov.i32 d0, #0xffaaffaa" -> "vmvn.i16 d0, #0x55"
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// "vmvn.i32 d0, #0xaaffaaff" -> "vmov.i16 d0, #0xff00"
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// On some CPUs the two instructions "vmov.i32 dD, #0" and "vmov.i32 qD, #0"
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// require zero cycles to execute so they should be used wherever possible for
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@ -1857,29 +1857,6 @@ public:
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return ARM_AM::isNEONi32splat(~Value);
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}
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bool isNEONByteReplicate(unsigned NumBytes) const {
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if (!isImm())
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return false;
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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// Must be a constant.
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if (!CE)
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return false;
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int64_t Value = CE->getValue();
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if (!Value)
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return false; // Don't bother with zero.
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unsigned char B = Value & 0xff;
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for (unsigned i = 1; i < NumBytes; ++i) {
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Value >>= 8;
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if ((Value & 0xff) != B)
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return false;
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}
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return true;
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}
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bool isNEONi16ByteReplicate() const { return isNEONByteReplicate(2); }
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bool isNEONi32ByteReplicate() const { return isNEONByteReplicate(4); }
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static bool isValidNEONi32vmovImm(int64_t Value) {
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// i32 value with set bits only in one byte X000, 0X00, 00X0, or 000X,
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// for VMOV/VMVN only, 00Xf or 0Xff are also accepted.
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@ -1891,6 +1868,63 @@ public:
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((Value & 0xffffffffff00ffff) == 0xffff);
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}
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bool isNEONReplicate(unsigned Width, unsigned NumElems, bool Inv,
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bool AllowMinusOne) const {
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assert(Width == 8 || Width == 16 || Width == 32 && "Invalid element width");
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assert(NumElems * Width <= 64 && "Invalid result width");
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if (!isImm())
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return false;
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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// Must be a constant.
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if (!CE)
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return false;
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int64_t Value = CE->getValue();
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if (!Value)
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return false; // Don't bother with zero.
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if (Inv)
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Value = ~Value;
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uint64_t Mask = (1ull << Width) - 1;
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uint64_t Elem = Value & Mask;
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if (!AllowMinusOne && Elem == Mask)
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return false;
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if (Width == 16 && (Elem & 0x00ff) != 0 && (Elem & 0xff00) != 0)
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return false;
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if (Width == 32 && !isValidNEONi32vmovImm(Elem))
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return false;
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for (unsigned i = 1; i < NumElems; ++i) {
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Value >>= Width;
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if ((Value & Mask) != Elem)
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return false;
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}
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return true;
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}
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bool isNEONByteReplicate(unsigned NumBytes) const {
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return isNEONReplicate(8, NumBytes, false, true);
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}
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static void checkNeonReplicateArgs(unsigned FromW, unsigned ToW) {
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assert(FromW == 8 || FromW == 16 || FromW == 32 && "Invalid source width");
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assert(ToW == 16 || ToW == 32 || ToW == 64 && "Invalid destination width");
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assert(FromW < ToW && "ToW is not less than FromW");
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}
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template<unsigned FromW, unsigned ToW>
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bool isNEONmovReplicate() const {
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checkNeonReplicateArgs(FromW, ToW);
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bool AllowMinusOne = ToW != 64;
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return isNEONReplicate(FromW, ToW / FromW, false, AllowMinusOne);
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}
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template<unsigned FromW, unsigned ToW>
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bool isNEONinvReplicate() const {
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checkNeonReplicateArgs(FromW, ToW);
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return isNEONReplicate(FromW, ToW / FromW, true, true);
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}
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bool isNEONi32vmov() const {
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if (isNEONByteReplicate(4))
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return false; // Let it to be classified as byte-replicate case.
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@ -2726,62 +2760,87 @@ public:
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Inst.addOperand(MCOperand::createImm(Value));
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}
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void addNEONinvByteReplicateOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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void addNEONi8ReplicateOperands(MCInst &Inst, bool Inv) const {
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// The immediate encodes the type of constant as well as the value.
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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unsigned Value = CE->getValue();
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assert((Inst.getOpcode() == ARM::VMOVv8i8 ||
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Inst.getOpcode() == ARM::VMOVv16i8) &&
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"All vmvn instructions that wants to replicate non-zero byte "
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"always must be replaced with VMOVv8i8 or VMOVv16i8.");
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unsigned B = ((~Value) & 0xff);
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"All instructions that wants to replicate non-zero byte "
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"always must be replaced with VMOVv8i8 or VMOVv16i8.");
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unsigned Value = CE->getValue();
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if (Inv)
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Value = ~Value;
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unsigned B = Value & 0xff;
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B |= 0xe00; // cmode = 0b1110
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Inst.addOperand(MCOperand::createImm(B));
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}
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void addNEONinvi8ReplicateOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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addNEONi8ReplicateOperands(Inst, true);
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}
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static unsigned encodeNeonVMOVImmediate(unsigned Value) {
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if (Value >= 256 && Value <= 0xffff)
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Value = (Value >> 8) | ((Value & 0xff) ? 0xc00 : 0x200);
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else if (Value > 0xffff && Value <= 0xffffff)
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Value = (Value >> 16) | ((Value & 0xff) ? 0xd00 : 0x400);
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else if (Value > 0xffffff)
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Value = (Value >> 24) | 0x600;
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return Value;
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}
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void addNEONi32vmovOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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// The immediate encodes the type of constant as well as the value.
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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unsigned Value = CE->getValue();
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if (Value >= 256 && Value <= 0xffff)
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Value = (Value >> 8) | ((Value & 0xff) ? 0xc00 : 0x200);
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else if (Value > 0xffff && Value <= 0xffffff)
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Value = (Value >> 16) | ((Value & 0xff) ? 0xd00 : 0x400);
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else if (Value > 0xffffff)
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Value = (Value >> 24) | 0x600;
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unsigned Value = encodeNeonVMOVImmediate(CE->getValue());
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Inst.addOperand(MCOperand::createImm(Value));
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}
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void addNEONvmovByteReplicateOperands(MCInst &Inst, unsigned N) const {
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void addNEONvmovi8ReplicateOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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addNEONi8ReplicateOperands(Inst, false);
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}
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void addNEONvmovi16ReplicateOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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// The immediate encodes the type of constant as well as the value.
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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unsigned Value = CE->getValue();
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assert((Inst.getOpcode() == ARM::VMOVv8i8 ||
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Inst.getOpcode() == ARM::VMOVv16i8) &&
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"All instructions that wants to replicate non-zero byte "
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"always must be replaced with VMOVv8i8 or VMOVv16i8.");
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unsigned B = Value & 0xff;
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B |= 0xe00; // cmode = 0b1110
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Inst.addOperand(MCOperand::createImm(B));
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assert((Inst.getOpcode() == ARM::VMOVv4i16 ||
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Inst.getOpcode() == ARM::VMOVv8i16 ||
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Inst.getOpcode() == ARM::VMVNv4i16 ||
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Inst.getOpcode() == ARM::VMVNv8i16) &&
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"All instructions that want to replicate non-zero half-word "
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"always must be replaced with V{MOV,MVN}v{4,8}i16.");
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uint64_t Value = CE->getValue();
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unsigned Elem = Value & 0xffff;
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if (Elem >= 256)
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Elem = (Elem >> 8) | 0x200;
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Inst.addOperand(MCOperand::createImm(Elem));
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}
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void addNEONi32vmovNegOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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// The immediate encodes the type of constant as well as the value.
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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unsigned Value = ~CE->getValue();
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if (Value >= 256 && Value <= 0xffff)
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Value = (Value >> 8) | ((Value & 0xff) ? 0xc00 : 0x200);
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else if (Value > 0xffff && Value <= 0xffffff)
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Value = (Value >> 16) | ((Value & 0xff) ? 0xd00 : 0x400);
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else if (Value > 0xffffff)
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Value = (Value >> 24) | 0x600;
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unsigned Value = encodeNeonVMOVImmediate(~CE->getValue());
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Inst.addOperand(MCOperand::createImm(Value));
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}
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void addNEONvmovi32ReplicateOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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assert((Inst.getOpcode() == ARM::VMOVv2i32 ||
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Inst.getOpcode() == ARM::VMOVv4i32 ||
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Inst.getOpcode() == ARM::VMVNv2i32 ||
|
||||
Inst.getOpcode() == ARM::VMVNv4i32) &&
|
||||
"All instructions that want to replicate non-zero word "
|
||||
"always must be replaced with V{MOV,MVN}v{2,4}i32.");
|
||||
uint64_t Value = CE->getValue();
|
||||
unsigned Elem = encodeNeonVMOVImmediate(Value & 0xffffffff);
|
||||
Inst.addOperand(MCOperand::createImm(Elem));
|
||||
}
|
||||
|
||||
void addNEONi64splatOperands(MCInst &Inst, unsigned N) const {
|
||||
assert(N == 1 && "Invalid number of operands!");
|
||||
// The immediate encodes the type of constant as well as the value.
|
||||
|
|
|
|||
|
|
@ -1,31 +0,0 @@
|
|||
@ PR18921, "vmov" part.
|
||||
@ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
|
||||
.text
|
||||
|
||||
@ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
|
||||
@ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
|
||||
|
||||
@ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
|
||||
@ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
|
||||
@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
|
||||
@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
|
||||
@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
|
||||
@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
|
||||
|
||||
vmov.i32 d2, #0xffffffff
|
||||
vmov.i32 q2, #0xffffffff
|
||||
vmov.i32 d2, #0xabababab
|
||||
vmov.i32 q2, #0xabababab
|
||||
vmov.i16 q2, #0xabab
|
||||
vmov.i16 q2, #0xabab
|
||||
|
||||
vmvn.i32 d2, #0xffffffff
|
||||
vmvn.i32 q2, #0xffffffff
|
||||
vmvn.i32 d2, #0xabababab
|
||||
vmvn.i32 q2, #0xabababab
|
||||
vmvn.i16 d2, #0xabab
|
||||
vmvn.i16 q2, #0xabab
|
||||
|
|
@ -0,0 +1,102 @@
|
|||
@ PR18921, "vmov" part.
|
||||
@ RUN: llvm-mc -triple=armv7-linux-gnueabi -show-encoding < %s | FileCheck %s
|
||||
.text
|
||||
vmov.i64 d2, #0xffffffffffffffff
|
||||
vmov.i64 q2, #0xffffffffffffffff
|
||||
vmov.i32 d2, #0xffffffff
|
||||
vmov.i32 q2, #0xffffffff
|
||||
vmov.i64 d2, #0xabababababababab
|
||||
vmov.i64 q2, #0xabababababababab
|
||||
vmov.i32 d2, #0xabababab
|
||||
vmov.i32 q2, #0xabababab
|
||||
vmov.i16 q2, #0xabab
|
||||
vmov.i16 q2, #0xabab
|
||||
|
||||
@ CHECK: vmov.i64 d2, #0xffffffffffffffff @ encoding: [0x3f,0x2e,0x87,0xf3]
|
||||
@ CHECK: vmov.i64 q2, #0xffffffffffffffff @ encoding: [0x7f,0x4e,0x87,0xf3]
|
||||
@ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
|
||||
@ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
|
||||
@ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
|
||||
@ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
|
||||
|
||||
vmov.i64 d2, #0x00a500a500a500a5
|
||||
vmov.i64 q2, #0x00a500a500a500a5
|
||||
vmov.i32 d2, #0x00a500a5
|
||||
vmov.i32 q2, #0x00a500a5
|
||||
vmov.i64 d2, #0xa500a500a500a500
|
||||
vmov.i64 q2, #0xa500a500a500a500
|
||||
vmov.i32 d2, #0xa500a500
|
||||
vmov.i32 q2, #0xa500a500
|
||||
|
||||
@ CHECK: vmov.i16 d2, #0xa5 @ encoding: [0x15,0x28,0x82,0xf3]
|
||||
@ CHECK: vmov.i16 q2, #0xa5 @ encoding: [0x55,0x48,0x82,0xf3]
|
||||
@ CHECK: vmov.i16 d2, #0xa5 @ encoding: [0x15,0x28,0x82,0xf3]
|
||||
@ CHECK: vmov.i16 q2, #0xa5 @ encoding: [0x55,0x48,0x82,0xf3]
|
||||
@ CHECK: vmov.i16 d2, #0xa500 @ encoding: [0x15,0x2a,0x82,0xf3]
|
||||
@ CHECK: vmov.i16 q2, #0xa500 @ encoding: [0x55,0x4a,0x82,0xf3]
|
||||
@ CHECK: vmov.i16 d2, #0xa500 @ encoding: [0x15,0x2a,0x82,0xf3]
|
||||
@ CHECK: vmov.i16 q2, #0xa500 @ encoding: [0x55,0x4a,0x82,0xf3]
|
||||
|
||||
vmov.i64 d2, #0x000000a5000000a5
|
||||
vmov.i64 q2, #0x000000a5000000a5
|
||||
vmov.i64 d2, #0x00a5ffff00a5ffff
|
||||
vmov.i64 q2, #0x00a5ffff00a5ffff
|
||||
|
||||
@ CHECK: vmov.i32 d2, #0xa5 @ encoding: [0x15,0x20,0x82,0xf3]
|
||||
@ CHECK: vmov.i32 q2, #0xa5 @ encoding: [0x55,0x40,0x82,0xf3]
|
||||
@ CHECK: vmov.i32 d2, #0xa5ffff @ encoding: [0x15,0x2d,0x82,0xf3]
|
||||
@ CHECK: vmov.i32 q2, #0xa5ffff @ encoding: [0x55,0x4d,0x82,0xf3]
|
||||
|
||||
vmvn.i64 d2, #0xffffffffffffffff
|
||||
vmvn.i64 q2, #0xffffffffffffffff
|
||||
vmvn.i32 d2, #0xffffffff
|
||||
vmvn.i32 q2, #0xffffffff
|
||||
vmvn.i64 d2, #0xabababababababab
|
||||
vmvn.i64 q2, #0xabababababababab
|
||||
vmvn.i32 d2, #0xabababab
|
||||
vmvn.i32 q2, #0xabababab
|
||||
vmvn.i16 d2, #0xabab
|
||||
vmvn.i16 q2, #0xabab
|
||||
|
||||
@ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
|
||||
@ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
|
||||
@ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
|
||||
@ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
|
||||
@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
|
||||
@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
|
||||
@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
|
||||
@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
|
||||
@ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2]
|
||||
@ CHECK: vmov.i8 q2, #0x54 @ encoding: [0x54,0x4e,0x85,0xf2]
|
||||
|
||||
vmvn.i64 d2, #0x00a500a500a500a5
|
||||
vmvn.i64 q2, #0x00a500a500a500a5
|
||||
vmvn.i32 d2, #0x00a500a5
|
||||
vmvn.i32 q2, #0x00a500a5
|
||||
vmvn.i64 d2, #0xa500a500a500a500
|
||||
vmvn.i64 q2, #0xa500a500a500a500
|
||||
vmvn.i32 d2, #0xa500a500
|
||||
vmvn.i32 q2, #0xa500a500
|
||||
|
||||
@ CHECK: vmvn.i16 d2, #0xa5 @ encoding: [0x35,0x28,0x82,0xf3]
|
||||
@ CHECK: vmvn.i16 q2, #0xa5 @ encoding: [0x75,0x48,0x82,0xf3]
|
||||
@ CHECK: vmvn.i16 d2, #0xa5 @ encoding: [0x35,0x28,0x82,0xf3]
|
||||
@ CHECK: vmvn.i16 q2, #0xa5 @ encoding: [0x75,0x48,0x82,0xf3]
|
||||
@ CHECK: vmvn.i16 d2, #0xa500 @ encoding: [0x35,0x2a,0x82,0xf3]
|
||||
@ CHECK: vmvn.i16 q2, #0xa500 @ encoding: [0x75,0x4a,0x82,0xf3]
|
||||
@ CHECK: vmvn.i16 d2, #0xa500 @ encoding: [0x35,0x2a,0x82,0xf3]
|
||||
@ CHECK: vmvn.i16 q2, #0xa500 @ encoding: [0x75,0x4a,0x82,0xf3]
|
||||
|
||||
vmvn.i64 d2, #0x000000a5000000a5
|
||||
vmvn.i64 q2, #0x000000a5000000a5
|
||||
vmvn.i64 d2, #0x00a5ffff00a5ffff
|
||||
vmvn.i64 q2, #0x00a5ffff00a5ffff
|
||||
|
||||
@ CHECK: vmvn.i32 d2, #0xa5 @ encoding: [0x35,0x20,0x82,0xf3]
|
||||
@ CHECK: vmvn.i32 q2, #0xa5 @ encoding: [0x75,0x40,0x82,0xf3]
|
||||
@ CHECK: vmvn.i32 d2, #0xa5ffff @ encoding: [0x35,0x2d,0x82,0xf3]
|
||||
@ CHECK: vmvn.i32 q2, #0xa5ffff @ encoding: [0x75,0x4d,0x82,0xf3]
|
||||
Loading…
Reference in New Issue