forked from OSchip/llvm-project
[X86] Add test case that shows failure to use a vector ANDN when both inputs to the AND are XORs.
The matching code tries to canonicalize XOR to the left, but if there are two XORs and only one is a vnot, this canonicalization can prevent matching. llvm-svn: 293402
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@ -5,13 +5,13 @@
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define void @t(<4 x float> %A) {
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; SSE-LABEL: t:
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; SSE: # BB#0:
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; SSE-NEXT: xorps .LCPI0_0, %xmm0
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; SSE-NEXT: xorps {{\.LCPI.*}}, %xmm0
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; SSE-NEXT: movaps %xmm0, 0
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; SSE-NEXT: retl
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;
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; AVX-LABEL: t:
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; AVX: # BB#0:
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; AVX-NEXT: vxorps .LCPI0_0, %xmm0, %xmm0
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; AVX-NEXT: vxorps {{\.LCPI.*}}, %xmm0, %xmm0
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; AVX-NEXT: vmovaps %xmm0, 0
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; AVX-NEXT: retl
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%tmp1277 = fsub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %A
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@ -85,3 +85,26 @@ entry:
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store <4 x float> %tmp30, <4 x float>* %d
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ret void
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}
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define <2 x i64> @andn_double_xor(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
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; SSE-LABEL: andn_double_xor:
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; SSE: # BB#0:
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; SSE-NEXT: pcmpeqd %xmm3, %xmm3
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; SSE-NEXT: pxor %xmm3, %xmm0
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; SSE-NEXT: pxor %xmm2, %xmm1
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; SSE-NEXT: pand %xmm1, %xmm0
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; SSE-NEXT: retl
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;
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; AVX-LABEL: andn_double_xor:
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; AVX: # BB#0:
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; AVX-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
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; AVX-NEXT: vpxor %xmm3, %xmm0, %xmm0
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; AVX-NEXT: vpxor %xmm2, %xmm1, %xmm1
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; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retl
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%1 = xor <2 x i64> %a, <i64 -1, i64 -1>
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%2 = xor <2 x i64> %b, %c
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%3 = and <2 x i64> %1, %2
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ret <2 x i64> %3
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}
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