[DSE,MSSA] Precommit additional tests for D73763.

This commit is contained in:
Florian Hahn 2020-03-20 12:44:29 +00:00
parent a4edea29be
commit ece6cf0fa5
3 changed files with 259 additions and 0 deletions

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -dse -enable-dse-memoryssa -S %s | FileCheck %s
declare i8* @_Znwm() local_unnamed_addr #0
; Function Attrs: argmemonly nounwind willreturn writeonly
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg) #1
define void @test1(i1 %c) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[COND_TRUE_I_I_I:%.*]], label [[COND_END_I_I_I:%.*]]
; CHECK: cond.true.i.i.i:
; CHECK-NEXT: ret void
; CHECK: cond.end.i.i.i:
; CHECK-NEXT: [[CALL_I_I_I_I_I:%.*]] = tail call noalias nonnull i8* @_Znam() #2
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL_I_I_I_I_I]] to i64*
; CHECK-NEXT: tail call void @llvm.memset.p0i8.i64(i8* nonnull align 8 [[CALL_I_I_I_I_I]], i8 0, i64 undef, i1 false)
; CHECK-NEXT: store i64 0, i64* [[TMP0]], align 8
; CHECK-NEXT: ret void
;
entry:
br i1 %c, label %cond.true.i.i.i, label %cond.end.i.i.i
cond.true.i.i.i: ; preds = %entry
ret void
cond.end.i.i.i: ; preds = %entry
%call.i.i.i.i.i = tail call noalias nonnull i8* @_Znam() #2
%0 = bitcast i8* %call.i.i.i.i.i to i64*
tail call void @llvm.memset.p0i8.i64(i8* nonnull align 8 %call.i.i.i.i.i, i8 0, i64 undef, i1 false) #3
store i64 0, i64* %0, align 8
ret void
}
declare i8* @_Znam() local_unnamed_addr #0
define void @test2(i1 %c) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[CLEANUP_CONT104:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
; CHECK-NEXT: [[MUL_I_I_I_I:%.*]] = shl nuw nsw i64 undef, 3
; CHECK-NEXT: [[CALL_I_I_I_I_I_I131:%.*]] = call noalias nonnull i8* @_Znwm() #2
; CHECK-NEXT: [[DOTCAST_I_I:%.*]] = bitcast i8* [[CALL_I_I_I_I_I_I131]] to i64*
; CHECK-NEXT: store i64 0, i64* [[DOTCAST_I_I]], align 8
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* nonnull align 8 [[CALL_I_I_I_I_I_I131]], i8 0, i64 [[MUL_I_I_I_I]], i1 false)
; CHECK-NEXT: ret void
; CHECK: cleanup.cont104:
; CHECK-NEXT: ret void
;
entry:
br i1 %c, label %cleanup.cont104, label %if.then
if.then: ; preds = %entry
%mul.i.i.i.i = shl nuw nsw i64 undef, 3
%call.i.i.i.i.i.i131 = call noalias nonnull i8* @_Znwm() #2
%.cast.i.i = bitcast i8* %call.i.i.i.i.i.i131 to i64*
store i64 0, i64* %.cast.i.i, align 8
call void @llvm.memset.p0i8.i64(i8* nonnull align 8 %call.i.i.i.i.i.i131, i8 0, i64 %mul.i.i.i.i, i1 false) #3
ret void
cleanup.cont104: ; preds = %entry
ret void
}
attributes #0 = { "use-soft-float"="false" }
attributes #1 = { argmemonly nounwind willreturn writeonly }
attributes #2 = { builtin nounwind }
attributes #3 = { nounwind }

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -basicaa -dse -enable-dse-memoryssa -S | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
declare void @use(i32 *)
define void @test4(i32* noalias %P, i1 %c1) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: store i32 1, i32* [[P:%.*]]
; CHECK-NEXT: br i1 [[C1:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
; CHECK: bb1:
; CHECK-NEXT: store i32 0, i32* [[P]]
; CHECK-NEXT: br label [[BB5:%.*]]
; CHECK: bb2:
; CHECK-NEXT: store i32 3, i32* [[P]]
; CHECK-NEXT: br label [[BB5]]
; CHECK: bb5:
; CHECK-NEXT: call void @use(i32* [[P]])
; CHECK-NEXT: ret void
;
store i32 1, i32* %P
br i1 %c1, label %bb1, label %bb2
bb1:
store i32 0, i32* %P
br label %bb5
bb2:
store i32 3, i32* %P
br label %bb5
bb5:
call void @use(i32* %P)
ret void
}
define void @test5(i32* noalias %P) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: store i32 1, i32* [[P:%.*]]
; CHECK-NEXT: br i1 true, label [[BB1:%.*]], label [[BB2:%.*]]
; CHECK: bb1:
; CHECK-NEXT: store i32 0, i32* [[P]]
; CHECK-NEXT: br label [[BB5:%.*]]
; CHECK: bb2:
; CHECK-NEXT: br i1 undef, label [[BB3:%.*]], label [[BB4:%.*]]
; CHECK: bb3:
; CHECK-NEXT: store i32 3, i32* [[P]]
; CHECK-NEXT: br label [[BB5]]
; CHECK: bb4:
; CHECK-NEXT: store i32 5, i32* [[P]]
; CHECK-NEXT: br label [[BB5]]
; CHECK: bb5:
; CHECK-NEXT: call void @use(i32* [[P]])
; CHECK-NEXT: ret void
;
store i32 1, i32* %P
br i1 true, label %bb1, label %bb2
bb1:
store i32 0, i32* %P
br label %bb5
bb2:
br i1 undef, label %bb3, label %bb4
bb3:
store i32 3, i32* %P
br label %bb5
bb4:
store i32 5, i32* %P
br label %bb5
bb5:
call void @use(i32* %P)
ret void
}

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -dse -enable-dse-memoryssa %s -S | FileCheck %s
%struct.ham = type { [3 x double], [3 x double]}
declare void @may_throw()
declare void @llvm.memset.p0i8.i64(i8* nocapture writeonly, i8, i64, i1 immarg)
define void @overlap1(%struct.ham* %arg, i1 %cond) {
; CHECK-LABEL: @overlap1(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds [[STRUCT_HAM:%.*]], %struct.ham* [[ARG:%.*]], i64 0, i32 0, i64 2
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 0, i64 1
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 0, i64 0
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 1, i64 2
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 1, i64 1
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 1, i32 0
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB7:%.*]], label [[BB8:%.*]]
; CHECK: bb7:
; CHECK-NEXT: br label [[BB9:%.*]]
; CHECK: bb8:
; CHECK-NEXT: br label [[BB9]]
; CHECK: bb9:
; CHECK-NEXT: store double 1.000000e+00, double* [[TMP2]], align 8
; CHECK-NEXT: store double 2.000000e+00, double* [[TMP1]], align 8
; CHECK-NEXT: store double 3.000000e+00, double* [[TMP]], align 8
; CHECK-NEXT: store double 4.000000e+00, double* [[TMP5]], align 8
; CHECK-NEXT: store double 5.000000e+00, double* [[TMP4]], align 8
; CHECK-NEXT: store double 6.000000e+00, double* [[TMP3]], align 8
; CHECK-NEXT: ret void
;
bb:
%tmp = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 0, i64 2
%tmp1 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 0, i64 1
%tmp2 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 0, i64 0
%tmp3 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0,i32 1, i64 2
%tmp4 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 1, i64 1
%tmp5 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 1, i32 0
%tmp6 = bitcast double* %tmp2 to i8*
call void @llvm.memset.p0i8.i64(i8* nonnull align 8 dereferenceable(48) %tmp6, i8 0, i64 48, i1 false)
br i1 %cond, label %bb7, label %bb8
bb7: ; preds = %bb
br label %bb9
bb8: ; preds = %bb
br label %bb9
bb9: ; preds = %bb8, %bb7
store double 1.0, double* %tmp2, align 8
store double 2.0, double* %tmp1, align 8
store double 3.0, double* %tmp, align 8
store double 4.0, double* %tmp5, align 8
store double 5.0, double* %tmp4, align 8
store double 6.0, double* %tmp3, align 8
ret void
}
define void @overlap2(%struct.ham* %arg, i1 %cond) {
; CHECK-LABEL: @overlap2(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds [[STRUCT_HAM:%.*]], %struct.ham* [[ARG:%.*]], i64 0, i32 0, i64 2
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 0, i64 1
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 0, i64 0
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 1, i64 2
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 1, i64 1
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_HAM]], %struct.ham* [[ARG]], i64 0, i32 1, i32 0
; CHECK-NEXT: [[TMP6:%.*]] = bitcast double* [[TMP2]] to i8*
; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* nonnull align 8 dereferenceable(48) [[TMP6]], i8 0, i64 48, i1 false)
; CHECK-NEXT: br i1 [[COND:%.*]], label [[BB7:%.*]], label [[BB8:%.*]]
; CHECK: bb7:
; CHECK-NEXT: call void @may_throw()
; CHECK-NEXT: br label [[BB9:%.*]]
; CHECK: bb8:
; CHECK-NEXT: br label [[BB9]]
; CHECK: bb9:
; CHECK-NEXT: store double 1.000000e+00, double* [[TMP2]], align 8
; CHECK-NEXT: store double 2.000000e+00, double* [[TMP1]], align 8
; CHECK-NEXT: store double 3.000000e+00, double* [[TMP]], align 8
; CHECK-NEXT: store double 4.000000e+00, double* [[TMP5]], align 8
; CHECK-NEXT: store double 5.000000e+00, double* [[TMP4]], align 8
; CHECK-NEXT: store double 6.000000e+00, double* [[TMP3]], align 8
; CHECK-NEXT: ret void
;
bb:
%tmp = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 0, i64 2
%tmp1 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 0, i64 1
%tmp2 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 0, i64 0
%tmp3 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0,i32 1, i64 2
%tmp4 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 1, i64 1
%tmp5 = getelementptr inbounds %struct.ham, %struct.ham* %arg, i64 0, i32 1, i32 0
%tmp6 = bitcast double* %tmp2 to i8*
call void @llvm.memset.p0i8.i64(i8* nonnull align 8 dereferenceable(48) %tmp6, i8 0, i64 48, i1 false)
br i1 %cond, label %bb7, label %bb8
bb7: ; preds = %bb
call void @may_throw()
br label %bb9
bb8: ; preds = %bb
br label %bb9
bb9: ; preds = %bb8, %bb7
store double 1.0, double* %tmp2, align 8
store double 2.0, double* %tmp1, align 8
store double 3.0, double* %tmp, align 8
store double 4.0, double* %tmp5, align 8
store double 5.0, double* %tmp4, align 8
store double 6.0, double* %tmp3, align 8
ret void
}