[X86] Teach fast isel to use MOV32ri64 for loading an unsigned 32 immediate into a 64-bit register.

Previously we used SUBREG_TO_REG+MOV32ri. But regular isel was changed recently to use the MOV32ri64 pseudo. Fast isel now does the same.

llvm-svn: 342788
This commit is contained in:
Craig Topper 2018-09-21 23:14:05 +00:00
parent 969f32d515
commit ecdab03d10
2 changed files with 7 additions and 15 deletions

View File

@ -3744,7 +3744,7 @@ unsigned X86FastISel::X86MaterializeInt(const ConstantInt *CI, MVT VT) {
case MVT::i32: Opc = X86::MOV32ri; break;
case MVT::i64: {
if (isUInt<32>(Imm))
Opc = X86::MOV32ri;
Opc = X86::MOV32ri64;
else if (isInt<32>(Imm))
Opc = X86::MOV64ri32;
else
@ -3752,14 +3752,6 @@ unsigned X86FastISel::X86MaterializeInt(const ConstantInt *CI, MVT VT) {
break;
}
}
if (VT == MVT::i64 && Opc == X86::MOV32ri) {
unsigned SrcReg = fastEmitInst_i(Opc, &X86::GR32RegClass, Imm);
unsigned ResultReg = createResultReg(&X86::GR64RegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::SUBREG_TO_REG), ResultReg)
.addImm(0).addReg(SrcReg).addImm(X86::sub_32bit);
return ResultReg;
}
return fastEmitInst_i(Opc, TLI.getRegClassFor(VT), Imm);
}

View File

@ -67,9 +67,9 @@ define i64 @test__blsr_u64(i64 %a0) {
define i64 @test__tzcnt_u64(i64 %a0) {
; X64-LABEL: test__tzcnt_u64:
; X64: # %bb.0:
; X64-NEXT: movl $64, %ecx
; X64-NEXT: tzcntq %rdi, %rax
; X64-NEXT: cmovbq %rcx, %rax
; X64-NEXT: tzcntq %rdi, %rcx
; X64-NEXT: movl $64, %eax
; X64-NEXT: cmovaeq %rcx, %rax
; X64-NEXT: retq
%cmp = icmp ne i64 %a0, 0
%cttz = call i64 @llvm.cttz.i64(i64 %a0, i1 true)
@ -151,9 +151,9 @@ define i64 @test_blsr_u64(i64 %a0) {
define i64 @test_tzcnt_u64(i64 %a0) {
; X64-LABEL: test_tzcnt_u64:
; X64: # %bb.0:
; X64-NEXT: movl $64, %ecx
; X64-NEXT: tzcntq %rdi, %rax
; X64-NEXT: cmovbq %rcx, %rax
; X64-NEXT: tzcntq %rdi, %rcx
; X64-NEXT: movl $64, %eax
; X64-NEXT: cmovaeq %rcx, %rax
; X64-NEXT: retq
%cmp = icmp ne i64 %a0, 0
%cttz = call i64 @llvm.cttz.i64(i64 %a0, i1 true)