forked from OSchip/llvm-project
MIPS DSP: add functions which decode DSP and accumulator registers.
llvm-svn: 164748
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42a352485b
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@ -108,6 +108,11 @@ static DecodeStatus DecodeCPURegsRegisterClass(MCInst &Inst,
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uint64_t Address,
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uint64_t Address,
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const void *Decoder);
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const void *Decoder);
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static DecodeStatus DecodeDSPRegsRegisterClass(MCInst &Inst,
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unsigned RegNo,
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uint64_t Address,
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const void *Decoder);
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static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst,
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static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst,
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unsigned RegNo,
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unsigned RegNo,
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uint64_t Address,
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uint64_t Address,
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@ -138,6 +143,11 @@ static DecodeStatus DecodeHWRegs64RegisterClass(MCInst &Inst,
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uint64_t Address,
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uint64_t Address,
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const void *Decoder);
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const void *Decoder);
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static DecodeStatus DecodeACRegsRegisterClass(MCInst &Inst,
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unsigned RegNo,
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uint64_t Address,
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const void *Decoder);
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static DecodeStatus DecodeBranchTarget(MCInst &Inst,
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static DecodeStatus DecodeBranchTarget(MCInst &Inst,
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unsigned Offset,
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unsigned Offset,
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uint64_t Address,
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uint64_t Address,
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@ -346,6 +356,13 @@ static DecodeStatus DecodeCPURegsRegisterClass(MCInst &Inst,
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return MCDisassembler::Success;
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return MCDisassembler::Success;
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}
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}
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static DecodeStatus DecodeDSPRegsRegisterClass(MCInst &Inst,
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unsigned RegNo,
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uint64_t Address,
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const void *Decoder) {
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return DecodeCPURegsRegisterClass(Inst, RegNo, Address, Decoder);
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}
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static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst,
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static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst,
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unsigned RegNo,
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unsigned RegNo,
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uint64_t Address,
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uint64_t Address,
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@ -463,6 +480,18 @@ static DecodeStatus DecodeHWRegs64RegisterClass(MCInst &Inst,
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return MCDisassembler::Success;
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return MCDisassembler::Success;
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}
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}
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static DecodeStatus DecodeACRegsRegisterClass(MCInst &Inst,
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unsigned RegNo,
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uint64_t Address,
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const void *Decoder) {
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if (RegNo >= 4)
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return MCDisassembler::Fail;
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unsigned Reg = getReg(Decoder, Mips::ACRegsRegClassID, RegNo);
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Inst.addOperand(MCOperand::CreateReg(Reg));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeBranchTarget(MCInst &Inst,
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static DecodeStatus DecodeBranchTarget(MCInst &Inst,
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unsigned Offset,
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unsigned Offset,
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uint64_t Address,
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uint64_t Address,
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