forked from OSchip/llvm-project
[WebAssembly] Remove duplicate disabling of passes
Also put all the disabled passes together llvm-svn: 264684
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@ -106,7 +106,6 @@ public:
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bool addILPOpts() override;
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void addPreRegAlloc() override;
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void addPostRegAlloc() override;
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void addMachineLateOptimization() override;
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bool addGCPasses() override { return false; }
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void addPreEmitPass() override;
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};
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@ -180,15 +179,19 @@ void WebAssemblyPassConfig::addPostRegAlloc() {
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// TODO: The following CodeGen passes don't currently support code containing
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// virtual registers. Consider removing their restrictions and re-enabling
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// them.
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//
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// Has no asserts of its own, but was not written to handle virtual regs.
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disablePass(&ShrinkWrapID);
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// We use our own PrologEpilogInserter which is very slightly modified to
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// tolerate virtual registers.
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disablePass(&PrologEpilogCodeInserterID);
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// Fails with: should be run after register allocation.
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// These functions all require the AllVRegsAllocated property.
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disablePass(&MachineCopyPropagationID);
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disablePass(&PostRASchedulerID);
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disablePass(&FuncletLayoutID);
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disablePass(&StackMapLivenessID);
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disablePass(&LiveDebugValuesID);
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if (getOptLevel() != CodeGenOpt::None) {
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// Mark registers as representing wasm's expression stack.
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@ -206,20 +209,11 @@ void WebAssemblyPassConfig::addPostRegAlloc() {
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addPass(createWebAssemblyPEI());
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}
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void WebAssemblyPassConfig::addMachineLateOptimization() {
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disablePass(&MachineCopyPropagationID);
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disablePass(&PostRASchedulerID);
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TargetPassConfig::addMachineLateOptimization();
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}
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void WebAssemblyPassConfig::addPreEmitPass() {
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TargetPassConfig::addPreEmitPass();
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// Eliminate multiple-entry loops.
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addPass(createWebAssemblyFixIrreducibleControlFlow());
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disablePass(&FuncletLayoutID);
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disablePass(&StackMapLivenessID);
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disablePass(&LiveDebugValuesID);
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// Put the CFG in structured form; insert BLOCK and LOOP markers.
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addPass(createWebAssemblyCFGStackify());
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