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[WebAssembly] Remove duplicate disabling of passes 

Also put all the disabled passes together

llvm-svn: 264684
This commit is contained in:
Derek Schuff 2016-03-28 22:52:20 +00:00
parent 69ada2f514
commit ecabac6244
1 changed files with 6 additions and 12 deletions
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18
llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
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@ -106,7 +106,6 @@ public:
bool addILPOpts() override; bool addILPOpts() override;
void addPreRegAlloc() override; void addPreRegAlloc() override;
void addPostRegAlloc() override; void addPostRegAlloc() override;
void addMachineLateOptimization() override;
bool addGCPasses() override { return false; } bool addGCPasses() override { return false; }
void addPreEmitPass() override; void addPreEmitPass() override;
}; };
@ -180,15 +179,19 @@ void WebAssemblyPassConfig::addPostRegAlloc() {
// TODO: The following CodeGen passes don't currently support code containing // TODO: The following CodeGen passes don't currently support code containing
// virtual registers. Consider removing their restrictions and re-enabling // virtual registers. Consider removing their restrictions and re-enabling
// them. // them.
//
// Has no asserts of its own, but was not written to handle virtual regs. // Has no asserts of its own, but was not written to handle virtual regs.
disablePass(&ShrinkWrapID); disablePass(&ShrinkWrapID);
// We use our own PrologEpilogInserter which is very slightly modified to // We use our own PrologEpilogInserter which is very slightly modified to
// tolerate virtual registers. // tolerate virtual registers.
disablePass(&PrologEpilogCodeInserterID); disablePass(&PrologEpilogCodeInserterID);
// Fails with: should be run after register allocation.
// These functions all require the AllVRegsAllocated property.
disablePass(&MachineCopyPropagationID); disablePass(&MachineCopyPropagationID);
disablePass(&PostRASchedulerID);
disablePass(&FuncletLayoutID);
disablePass(&StackMapLivenessID);
disablePass(&LiveDebugValuesID);
if (getOptLevel() != CodeGenOpt::None) { if (getOptLevel() != CodeGenOpt::None) {
// Mark registers as representing wasm's expression stack. // Mark registers as representing wasm's expression stack.
@ -206,20 +209,11 @@ void WebAssemblyPassConfig::addPostRegAlloc() {
addPass(createWebAssemblyPEI()); addPass(createWebAssemblyPEI());
} }
void WebAssemblyPassConfig::addMachineLateOptimization() {
disablePass(&MachineCopyPropagationID);
disablePass(&PostRASchedulerID);
TargetPassConfig::addMachineLateOptimization();
}
void WebAssemblyPassConfig::addPreEmitPass() { void WebAssemblyPassConfig::addPreEmitPass() {
TargetPassConfig::addPreEmitPass(); TargetPassConfig::addPreEmitPass();
// Eliminate multiple-entry loops. // Eliminate multiple-entry loops.
addPass(createWebAssemblyFixIrreducibleControlFlow()); addPass(createWebAssemblyFixIrreducibleControlFlow());
disablePass(&FuncletLayoutID);
disablePass(&StackMapLivenessID);
disablePass(&LiveDebugValuesID);
// Put the CFG in structured form; insert BLOCK and LOOP markers. // Put the CFG in structured form; insert BLOCK and LOOP markers.
addPass(createWebAssemblyCFGStackify()); addPass(createWebAssemblyCFGStackify());