forked from OSchip/llvm-project
[IVDescriptors] Skip FOR where we have multiple sink points for now.
This fixes a crash with instructions where multiple operands are first-order-recurrences.
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c671639af6
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@ -721,6 +721,13 @@ bool RecurrenceDescriptor::isFirstOrderRecurrence(
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if (I->getParent()->getTerminator() == I)
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return false;
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// Do not try to sink an instruction multiple times (if multiple operands
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// are first order recurrences).
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// TODO: We can support this case, by sinking the instruction after the
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// 'deepest' previous instruction.
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if (SinkAfter.find(I) != SinkAfter.end())
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return false;
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if (DT->dominates(Previous, I)) // We already are good w/o sinking.
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return true;
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@ -243,3 +243,33 @@ for:
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exit:
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ret void
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}
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; TODO: We should be able to sink %tmp38 after %tmp60.
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define void @instruction_with_2_FOR_operands() {
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; CHECK-LABEL: define void @instruction_with_2_FOR_operands(
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; CHECK-NEXT: bb:
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; CHECK-NEXT: br label %bb13
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; CHECK-LABEL: bb13:
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; CHECK: br i1 %tmp12, label %bb13, label %bb74
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; CHECK-LABEL: bb74:
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; CHECK-NEXT: ret void
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;
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bb:
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br label %bb13
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bb13: ; preds = %bb13, %bb
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%tmp37 = phi float [ %tmp60, %bb13 ], [ undef, %bb ]
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%tmp27 = phi float [ %tmp49, %bb13 ], [ undef, %bb ]
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%indvars.iv = phi i64 [ %indvars.iv.next, %bb13 ], [ 0, %bb ]
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%tmp38 = fmul fast float %tmp37, %tmp27
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%tmp49 = load float, float* undef, align 4
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%tmp60 = load float, float* undef, align 4
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%tmp12 = icmp slt i64 %indvars.iv, undef
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br i1 %tmp12, label %bb13, label %bb74
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bb74: ; preds = %bb13
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ret void
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}
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