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[SEH] Fix llvm.eh.exceptioncode fast register allocation assertion 

I called the wrong MachineBasicBlock::addLiveIn() overload.

llvm-svn: 249786
This commit is contained in:
Reid Kleckner 2015-10-09 00:15:13 +00:00
parent 21427ada3e
commit ebef256269
3 changed files with 3 additions and 4 deletions
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1
llvm/include/llvm/CodeGen/SelectionDAGISel.h
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@ -264,7 +264,6 @@ private:
/// personality specific tasks. Returns true if the block should be
/// instruction selected, false if no code should be emitted for it.
bool PrepareEHLandingPad();
bool PrepareEHPad();
/// \brief Perform instruction selection on all basic blocks in the function.
void SelectAllBasicBlocks(const Function &Fn);

2
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@ -950,7 +950,7 @@ bool SelectionDAGISel::PrepareEHLandingPad() {
// the live in physreg and copy into the vreg.
MCPhysReg EHPhysReg = TLI->getExceptionPointerRegister();
assert(EHPhysReg && "target lacks exception pointer register");
FuncInfo->ExceptionPointerVirtReg = MBB->addLiveIn(EHPhysReg, PtrRC);
MBB->addLiveIn(EHPhysReg);
unsigned VReg = FuncInfo->getCatchPadExceptionPointerVReg(CPI, PtrRC);
BuildMI(*MBB, FuncInfo->InsertPt, SDB->getCurDebugLoc(),
TII->get(TargetOpcode::COPY), VReg)

4
llvm/test/CodeGen/X86/seh-exception-code.ll
View File

@ -1,4 +1,5 @@
; RUN: llc < %s | FileCheck %s
; RUN: llc -O0 < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
@ -34,8 +35,7 @@ catchendblock: ; preds = %catch.dispatch
; CHECK-LABEL: ehcode:
; CHECK: xorl %ecx, %ecx
; CHECK: callq f
; CHECK: retq
; CHECK: # %__except
; CHECK-NEXT: movl %eax, %ecx
; CHECK: movl %eax, %ecx
; CHECK-NEXT: callq f