Pass in a value type to getRegForInlineAsmConstraint, allowing targets to

select different sets of registers depending on the type requested. llvm-svn: 26304
2006-02-21 23:10:29 +00:00 · 2006-02-21 23:10:29 +00:00 · ebb7489537
parent d58478161f
commit ebb7489537
1 changed files with 2 additions and 1 deletions
--- a/llvm/include/llvm/Target/TargetLowering.h
+++ b/llvm/include/llvm/Target/TargetLowering.h
@ -496,7 +496,8 @@ public:
  /// satisfy the constraint.  This should only be used for physregs and 
  /// C_RegisterClass constraints.
  virtual std::vector<unsigned> 
-  getRegForInlineAsmConstraint(const std::string &Constraint) const;
+  getRegForInlineAsmConstraint(const std::string &Constraint,
+                               MVT::ValueType VT) const;
  
  /// isOperandValidForConstraint - Return true if the specified SDOperand is
  /// valid for the specified target constraint letter.