[SystemZ] Add disassembler support

llvm-svn: 181777

llvm/docs/CodeGenerator.rst

@@ -1838,7 +1838,7 @@ Here is the table:
 :raw-html:`<td class="no"></td> <!-- Mips -->`
 :raw-html:`<td class="na"></td> <!-- NVPTX -->`
 :raw-html:`<td class="no"></td> <!-- PowerPC -->`
-:raw-html:`<td class="no"></td> <!-- SystemZ -->`
+:raw-html:`<td class="yes"></td> <!-- SystemZ -->`
 :raw-html:`<td class="no"></td> <!-- Sparc -->`
 :raw-html:`<td class="yes"></td> <!-- X86 -->`
 :raw-html:`<td class="yes"></td> <!-- XCore -->`

llvm/lib/Target/SystemZ/CMakeLists.txt

@@ -4,6 +4,7 @@ tablegen(LLVM SystemZGenAsmMatcher.inc -gen-asm-matcher)
 tablegen(LLVM SystemZGenAsmWriter.inc -gen-asm-writer)
 tablegen(LLVM SystemZGenCallingConv.inc -gen-callingconv)
 tablegen(LLVM SystemZGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM SystemZGenDisassemblerTables.inc -gen-disassembler)
 tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
 tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info)
 tablegen(LLVM SystemZGenRegisterInfo.inc -gen-register-info)
@@ -27,6 +28,7 @@ add_llvm_target(SystemZCodeGen
 add_dependencies(LLVMSystemZCodeGen intrinsics_gen)
 
 add_subdirectory(AsmParser)
+add_subdirectory(Disassembler)
 add_subdirectory(InstPrinter)
 add_subdirectory(TargetInfo)
 add_subdirectory(MCTargetDesc)

llvm/lib/Target/SystemZ/Disassembler/CMakeLists.txt

@@ -0,0 +1,7 @@
+include_directories( ${CMAKE_CURRENT_BINARY_DIR}/.. ${CMAKE_CURRENT_SOURCE_DIR}/.. )
+
+add_llvm_library(LLVMSystemZDisassembler
+  SystemZDisassembler.cpp
+  )
+
+add_dependencies(LLVMSystemZDisassembler SystemZCommonTableGen)

llvm/lib/Target/SystemZ/Disassembler/LLVMBuild.txt

@@ -0,0 +1,23 @@
+;===-- ./lib/Target/SystemZ/Disassembler/LLVMBuild.txt ---------*- Conf -*--===;
+;
+;                     The LLVM Compiler Infrastructure
+;
+; This file is distributed under the University of Illinois Open Source
+; License. See LICENSE.TXT for details.
+;
+;===------------------------------------------------------------------------===;
+;
+; This is an LLVMBuild description file for the components in this subdirectory.
+;
+; For more information on the LLVMBuild system, please see:
+;
+;   http://llvm.org/docs/LLVMBuild.html
+;
+;===------------------------------------------------------------------------===;
+
+[component_0]
+type = Library
+name = SystemZDisassembler
+parent = SystemZ
+required_libraries = MC Support SystemZDesc SystemZInfo
+add_to_library_groups = SystemZ

llvm/lib/Target/SystemZ/Disassembler/Makefile

@@ -0,0 +1,16 @@
+##===-- lib/Target/SystemZ/Disassembler/Makefile -----------*- Makefile -*-===##
+#
+#                     The LLVM Compiler Infrastructure
+#
+# This file is distributed under the University of Illinois Open Source
+# License. See LICENSE.TXT for details.
+#
+##===----------------------------------------------------------------------===##
+
+LEVEL = ../../../..
+LIBRARYNAME = LLVMSystemZDisassembler
+
+# Hack: we need to include 'main' x86 target directory to grab private headers
+CPP.Flags += -I$(PROJ_OBJ_DIR)/.. -I$(PROJ_SRC_DIR)/..
+
+include $(LEVEL)/Makefile.common

llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp

@@ -0,0 +1,301 @@
+//===-- SystemZDisassembler.cpp - Disassembler for SystemZ ------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "SystemZ.h"
+#include "llvm/MC/MCDisassembler.h"
+#include "llvm/MC/MCFixedLenDisassembler.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/Support/MemoryObject.h"
+#include "llvm/Support/TargetRegistry.h"
+
+using namespace llvm;
+
+typedef MCDisassembler::DecodeStatus DecodeStatus;
+
+namespace {
+class SystemZDisassembler : public MCDisassembler {
+public:
+  SystemZDisassembler(const MCSubtargetInfo &STI)
+    : MCDisassembler(STI) {}
+  virtual ~SystemZDisassembler() {}
+
+  // Override MCDisassembler.
+  virtual DecodeStatus getInstruction(MCInst &instr,
+                                      uint64_t &size,
+                                      const MemoryObject &region,
+                                      uint64_t address,
+                                      raw_ostream &vStream,
+                                      raw_ostream &cStream) const LLVM_OVERRIDE;
+};
+} // end anonymous namespace
+
+static MCDisassembler *createSystemZDisassembler(const Target &T,
+                                                 const MCSubtargetInfo &STI) {
+  return new SystemZDisassembler(STI);
+}
+
+extern "C" void LLVMInitializeSystemZDisassembler() {
+  // Register the disassembler.
+  TargetRegistry::RegisterMCDisassembler(TheSystemZTarget,
+                                         createSystemZDisassembler);
+}
+
+static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                        const unsigned *Regs,
+                                        bool isAddress = false) {
+  assert(RegNo < 16 && "Invalid register");
+  if (!isAddress || RegNo) {
+    RegNo = Regs[RegNo];
+    if (RegNo == 0)
+      return MCDisassembler::Fail;
+  }
+  Inst.addOperand(MCOperand::CreateReg(RegNo));
+  return MCDisassembler::Success;
+}
+
+static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                               uint64_t Address,
+                                               const void *Decoder) {
+  return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs);
+}
+
+static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                               uint64_t Address,
+                                               const void *Decoder) {
+  return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs);
+}
+
+static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                                uint64_t Address,
+                                                const void *Decoder) {
+  return decodeRegisterClass(Inst, RegNo, SystemZMC::GR128Regs);
+}
+
+static DecodeStatus DecodeADDR64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                                 uint64_t Address,
+                                                 const void *Decoder) {
+  return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs, true);
+}
+
+static DecodeStatus DecodeFP32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                               uint64_t Address,
+                                               const void *Decoder) {
+  return decodeRegisterClass(Inst, RegNo, SystemZMC::FP32Regs);
+}
+
+static DecodeStatus DecodeFP64BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                               uint64_t Address,
+                                               const void *Decoder) {
+  return decodeRegisterClass(Inst, RegNo, SystemZMC::FP64Regs);
+}
+
+static DecodeStatus DecodeFP128BitRegisterClass(MCInst &Inst, uint64_t RegNo,
+                                                uint64_t Address,
+                                                const void *Decoder) {
+  return decodeRegisterClass(Inst, RegNo, SystemZMC::FP128Regs);
+}
+
+template<unsigned N>
+static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm) {
+  assert(isUInt<N>(Imm) && "Invalid immediate");
+  Inst.addOperand(MCOperand::CreateImm(Imm));
+  return MCDisassembler::Success;
+}
+
+template<unsigned N>
+static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm) {
+  assert(isUInt<N>(Imm) && "Invalid immediate");
+  Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm)));
+  return MCDisassembler::Success;
+}
+
+static DecodeStatus decodeAccessRegOperand(MCInst &Inst, uint64_t Imm,
+                                           uint64_t Address,
+                                           const void *Decoder) {
+  return decodeUImmOperand<4>(Inst, Imm);
+}
+
+static DecodeStatus decodeU4ImmOperand(MCInst &Inst, uint64_t Imm,
+                                       uint64_t Address, const void *Decoder) {
+  return decodeUImmOperand<4>(Inst, Imm);
+}
+
+static DecodeStatus decodeU6ImmOperand(MCInst &Inst, uint64_t Imm,
+                                       uint64_t Address, const void *Decoder) {
+  return decodeUImmOperand<6>(Inst, Imm);
+}
+
+static DecodeStatus decodeU8ImmOperand(MCInst &Inst, uint64_t Imm,
+                                       uint64_t Address, const void *Decoder) {
+  return decodeUImmOperand<8>(Inst, Imm);
+}
+
+static DecodeStatus decodeU16ImmOperand(MCInst &Inst, uint64_t Imm,
+                                        uint64_t Address, const void *Decoder) {
+  return decodeUImmOperand<16>(Inst, Imm);
+}
+
+static DecodeStatus decodeU32ImmOperand(MCInst &Inst, uint64_t Imm,
+                                        uint64_t Address, const void *Decoder) {
+  return decodeUImmOperand<32>(Inst, Imm);
+}
+
+static DecodeStatus decodeS8ImmOperand(MCInst &Inst, uint64_t Imm,
+                                       uint64_t Address, const void *Decoder) {
+  return decodeSImmOperand<8>(Inst, Imm);
+}
+
+static DecodeStatus decodeS16ImmOperand(MCInst &Inst, uint64_t Imm,
+                                        uint64_t Address, const void *Decoder) {
+  return decodeSImmOperand<16>(Inst, Imm);
+}
+
+static DecodeStatus decodeS32ImmOperand(MCInst &Inst, uint64_t Imm,
+                                        uint64_t Address, const void *Decoder) {
+  return decodeSImmOperand<32>(Inst, Imm);
+}
+
+template<unsigned N>
+static DecodeStatus decodePCDBLOperand(MCInst &Inst, uint64_t Imm,
+                                       uint64_t Address) {
+  assert(isUInt<N>(Imm) && "Invalid PC-relative offset");
+  Inst.addOperand(MCOperand::CreateImm(SignExtend64<N>(Imm) * 2 + Address));
+  return MCDisassembler::Success;
+}
+
+static DecodeStatus decodePC16DBLOperand(MCInst &Inst, uint64_t Imm,
+                                         uint64_t Address,
+                                         const void *Decoder) {
+  return decodePCDBLOperand<16>(Inst, Imm, Address);
+}
+
+static DecodeStatus decodePC32DBLOperand(MCInst &Inst, uint64_t Imm,
+                                         uint64_t Address,
+                                         const void *Decoder) {
+  return decodePCDBLOperand<32>(Inst, Imm, Address);
+}
+
+static DecodeStatus decodeBDAddr12Operand(MCInst &Inst, uint64_t Field,
+                                          const unsigned *Regs) {
+  uint64_t Base = Field >> 12;
+  uint64_t Disp = Field & 0xfff;
+  assert(Base < 16 && "Invalid BDAddr12");
+  Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
+  Inst.addOperand(MCOperand::CreateImm(Disp));
+  return MCDisassembler::Success;
+}
+
+static DecodeStatus decodeBDAddr20Operand(MCInst &Inst, uint64_t Field,
+                                          const unsigned *Regs) {
+  uint64_t Base = Field >> 20;
+  uint64_t Disp = ((Field << 12) & 0xff000) | ((Field >> 8) & 0xfff);
+  assert(Base < 16 && "Invalid BDAddr20");
+  Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
+  Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
+  return MCDisassembler::Success;
+}
+
+static DecodeStatus decodeBDXAddr12Operand(MCInst &Inst, uint64_t Field,
+                                           const unsigned *Regs) {
+  uint64_t Index = Field >> 16;
+  uint64_t Base = (Field >> 12) & 0xf;
+  uint64_t Disp = Field & 0xfff;
+  assert(Index < 16 && "Invalid BDXAddr12");
+  Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
+  Inst.addOperand(MCOperand::CreateImm(Disp));
+  Inst.addOperand(MCOperand::CreateReg(Index == 0 ? 0 : Regs[Index]));
+  return MCDisassembler::Success;
+}
+
+static DecodeStatus decodeBDXAddr20Operand(MCInst &Inst, uint64_t Field,
+                                           const unsigned *Regs) {
+  uint64_t Index = Field >> 24;
+  uint64_t Base = (Field >> 20) & 0xf;
+  uint64_t Disp = ((Field & 0xfff00) >> 8) | ((Field & 0xff) << 12);
+  assert(Index < 16 && "Invalid BDXAddr20");
+  Inst.addOperand(MCOperand::CreateReg(Base == 0 ? 0 : Regs[Base]));
+  Inst.addOperand(MCOperand::CreateImm(SignExtend64<20>(Disp)));
+  Inst.addOperand(MCOperand::CreateReg(Index == 0 ? 0 : Regs[Index]));
+  return MCDisassembler::Success;
+}
+
+static DecodeStatus decodeBDAddr32Disp12Operand(MCInst &Inst, uint64_t Field,
+                                                uint64_t Address,
+                                                const void *Decoder) {
+  return decodeBDAddr12Operand(Inst, Field, SystemZMC::GR32Regs);
+}
+
+static DecodeStatus decodeBDAddr32Disp20Operand(MCInst &Inst, uint64_t Field,
+                                                uint64_t Address,
+                                                const void *Decoder) {
+  return decodeBDAddr20Operand(Inst, Field, SystemZMC::GR32Regs);
+}
+
+static DecodeStatus decodeBDAddr64Disp12Operand(MCInst &Inst, uint64_t Field,
+                                                uint64_t Address,
+                                                const void *Decoder) {
+  return decodeBDAddr12Operand(Inst, Field, SystemZMC::GR64Regs);
+}
+
+static DecodeStatus decodeBDAddr64Disp20Operand(MCInst &Inst, uint64_t Field,
+                                                uint64_t Address,
+                                                const void *Decoder) {
+  return decodeBDAddr20Operand(Inst, Field, SystemZMC::GR64Regs);
+}
+
+static DecodeStatus decodeBDXAddr64Disp12Operand(MCInst &Inst, uint64_t Field,
+                                                 uint64_t Address,
+                                                 const void *Decoder) {
+  return decodeBDXAddr12Operand(Inst, Field, SystemZMC::GR64Regs);
+}
+
+static DecodeStatus decodeBDXAddr64Disp20Operand(MCInst &Inst, uint64_t Field,
+                                                 uint64_t Address,
+                                                 const void *Decoder) {
+  return decodeBDXAddr20Operand(Inst, Field, SystemZMC::GR64Regs);
+}
+
+#include "SystemZGenDisassemblerTables.inc"
+
+DecodeStatus SystemZDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
+                                                 const MemoryObject &Region,
+                                                 uint64_t Address,
+                                                 raw_ostream &os,
+                                                 raw_ostream &cs) const {
+  // Get the first two bytes of the instruction.
+  uint8_t Bytes[6];
+  Size = 0;
+  if (Region.readBytes(Address, 2, Bytes, 0) == -1)
+    return MCDisassembler::Fail;
+
+  // The top 2 bits of the first byte specify the size.
+  const uint8_t *Table;
+  if (Bytes[0] < 0x40) {
+    Size = 2;
+    Table = DecoderTable16;
+  } else if (Bytes[0] < 0xc0) {
+    Size = 4;
+    Table = DecoderTable32;
+  } else {
+    Size = 6;
+    Table = DecoderTable48;
+  }
+
+  // Read any remaining bytes.
+  if (Size > 2 && Region.readBytes(Address + 2, Size - 2, Bytes + 2, 0) == -1)
+    return MCDisassembler::Fail;
+
+  // Construct the instruction.
+  uint64_t Inst = 0;
+  for (uint64_t I = 0; I < Size; ++I)
+    Inst = (Inst << 8) | Bytes[I];
+
+  return decodeInstruction(Table, MI, Inst, Address, this, STI);
+}

llvm/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.cpp

@@ -114,10 +114,26 @@ void SystemZInstPrinter::printAccessRegOperand(const MCInst *MI, int OpNum,
   O << "%a" << (unsigned int)Value;
 }
 
+void SystemZInstPrinter::printPCRelOperand(const MCInst *MI, int OpNum,
+                                           raw_ostream &O) {
+  const MCOperand &MO = MI->getOperand(OpNum);
+  if (MO.isImm()) {
+    O << "0x";
+    O.write_hex(MO.getImm());
+  } else
+    O << *MO.getExpr();
+}
+
 void SystemZInstPrinter::printCallOperand(const MCInst *MI, int OpNum,
                                           raw_ostream &O) {
-  printOperand(MI, OpNum, O);
-  O << "@PLT";
+  const MCOperand &MO = MI->getOperand(OpNum);
+  if (MO.isImm()) {
+    O << "0x";
+    O.write_hex(MO.getImm());
+  } else {
+    O << *MO.getExpr();
+    O << "@PLT";
+  }
 }
 
 void SystemZInstPrinter::printOperand(const MCInst *MI, int OpNum,

llvm/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h

@@ -56,6 +56,7 @@ private:
   void printU16ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
   void printS32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
   void printU32ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
+  void printPCRelOperand(const MCInst *MI, int OpNum, raw_ostream &O);
   void printCallOperand(const MCInst *MI, int OpNum, raw_ostream &O);
   void printAccessRegOperand(const MCInst *MI, int OpNum, raw_ostream &O);
 

llvm/lib/Target/SystemZ/LLVMBuild.txt

@@ -16,7 +16,7 @@
 ;===------------------------------------------------------------------------===;
 
 [common]
-subdirectories = AsmParser InstPrinter MCTargetDesc TargetInfo
+subdirectories = AsmParser Disassembler InstPrinter MCTargetDesc TargetInfo
 
 [component_0]
 type = TargetGroup
@@ -24,6 +24,7 @@ name = SystemZ
 parent = Target
 has_asmparser = 1
 has_asmprinter = 1
+has_disassembler = 1
 has_jit = 1
 
 [component_1]

llvm/lib/Target/SystemZ/Makefile

@@ -16,13 +16,14 @@ BUILT_SOURCES = SystemZGenRegisterInfo.inc \
 		SystemZGenAsmWriter.inc \
 		SystemZGenAsmMatcher.inc \
 		SystemZGenCodeEmitter.inc \
+		SystemZGenDisassemblerTables.inc \
 		SystemZGenInstrInfo.inc \
 		SystemZGenDAGISel.inc \
 		SystemZGenSubtargetInfo.inc \
 		SystemZGenCallingConv.inc \
 		SystemZGenMCCodeEmitter.inc
 
-DIRS = InstPrinter AsmParser TargetInfo MCTargetDesc
+DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc
 
 include $(LEVEL)/Makefile.common
 

llvm/lib/Target/SystemZ/SystemZInstrFormats.td

@@ -99,6 +99,7 @@ def getDisp20Opcode : InstrMapping {
 class InstRI<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<4, outs, ins, asmstr, pattern> {
   field bits<32> Inst;
+  field bits<32> SoftFail = 0;
 
   bits<4> R1;
   bits<16> I2;
@@ -112,6 +113,7 @@ class InstRI<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRIEf<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<6, outs, ins, asmstr, pattern> {
   field bits<48> Inst;
+  field bits<48> SoftFail = 0;
 
   bits<4> R1;
   bits<4> R2;
@@ -131,6 +133,7 @@ class InstRIEf<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRIL<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<6, outs, ins, asmstr, pattern> {
   field bits<48> Inst;
+  field bits<48> SoftFail = 0;
 
   bits<4> R1;
   bits<32> I2;
@@ -144,6 +147,7 @@ class InstRIL<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRR<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<2, outs, ins, asmstr, pattern> {
   field bits<16> Inst;
+  field bits<16> SoftFail = 0;
 
   bits<4> R1;
   bits<4> R2;
@@ -156,6 +160,7 @@ class InstRR<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRRD<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<4, outs, ins, asmstr, pattern> {
   field bits<32> Inst;
+  field bits<32> SoftFail = 0;
 
   bits<4> R1;
   bits<4> R3;
@@ -171,6 +176,7 @@ class InstRRD<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRRE<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<4, outs, ins, asmstr, pattern> {
   field bits<32> Inst;
+  field bits<32> SoftFail = 0;
 
   bits<4> R1;
   bits<4> R2;
@@ -184,6 +190,7 @@ class InstRRE<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRRF<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<4, outs, ins, asmstr, pattern> {
   field bits<32> Inst;
+  field bits<32> SoftFail = 0;
 
   bits<4> R1;
   bits<4> R2;
@@ -199,6 +206,7 @@ class InstRRF<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRX<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<4, outs, ins, asmstr, pattern> {
   field bits<32> Inst;
+  field bits<32> SoftFail = 0;
 
   bits<4> R1;
   bits<20> XBD2;
@@ -213,6 +221,7 @@ class InstRX<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRXE<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<6, outs, ins, asmstr, pattern> {
   field bits<48> Inst;
+  field bits<48> SoftFail = 0;
 
   bits<4> R1;
   bits<20> XBD2;
@@ -229,6 +238,7 @@ class InstRXE<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRXF<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<6, outs, ins, asmstr, pattern> {
   field bits<48> Inst;
+  field bits<48> SoftFail = 0;
 
   bits<4> R1;
   bits<4> R3;
@@ -247,6 +257,7 @@ class InstRXF<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRXY<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<6, outs, ins, asmstr, pattern> {
   field bits<48> Inst;
+  field bits<48> SoftFail = 0;
 
   bits<4> R1;
   bits<28> XBD2;
@@ -263,6 +274,7 @@ class InstRXY<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRS<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<4, outs, ins, asmstr, pattern> {
   field bits<32> Inst;
+  field bits<32> SoftFail = 0;
 
   bits<4> R1;
   bits<4> R3;
@@ -277,6 +289,7 @@ class InstRS<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstRSY<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<6, outs, ins, asmstr, pattern> {
   field bits<48> Inst;
+  field bits<48> SoftFail = 0;
 
   bits<4> R1;
   bits<4> R3;
@@ -294,6 +307,7 @@ class InstRSY<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstSI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<4, outs, ins, asmstr, pattern> {
   field bits<32> Inst;
+  field bits<32> SoftFail = 0;
 
   bits<16> BD1;
   bits<8> I2;
@@ -306,6 +320,7 @@ class InstSI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstSIL<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<6, outs, ins, asmstr, pattern> {
   field bits<48> Inst;
+  field bits<48> SoftFail = 0;
 
   bits<16> BD1;
   bits<16> I2;
@@ -318,6 +333,7 @@ class InstSIL<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
 class InstSIY<bits<16> op, dag outs, dag ins, string asmstr, list<dag> pattern>
   : InstSystemZ<6, outs, ins, asmstr, pattern> {
   field bits<48> Inst;
+  field bits<48> SoftFail = 0;
 
   bits<24> BD1;
   bits<8> I2;

llvm/lib/Target/SystemZ/SystemZOperands.td

@@ -24,6 +24,7 @@ class ImmediateAsmOperand<string name>
 class Immediate<ValueType vt, code pred, SDNodeXForm xform, string asmop>
   : PatLeaf<(vt imm), pred, xform>, Operand<vt> {
   let PrintMethod = "print"##asmop##"Operand";
+  let DecoderMethod = "decode"##asmop##"Operand";
   let ParserMatchClass = !cast<AsmOperandClass>(asmop);
 }
 
@@ -37,6 +38,7 @@ class PCRelAsmOperand<string size> : ImmediateAsmOperand<"PCRel"##size> {
 // Constructs an operand for a PC-relative address with address type VT.
 // ASMOP is the associated asm operand.
 class PCRelOperand<ValueType vt, AsmOperandClass asmop> : Operand<vt> {
+  let PrintMethod = "printPCRelOperand";
   let ParserMatchClass = asmop;
 }
 
@@ -59,8 +61,9 @@ class AddressAsmOperand<string format, string bitsize, string dispsize>
 }
 
 // Constructs both a DAG pattern and instruction operand for an addressing mode.
-// The mode is selected by custom code in select<TYPE><DISPSIZE><SUFFIX>()
-// and encoded by custom code in get<FORMAT><DISPSIZE>Encoding().
+// The mode is selected by custom code in select<TYPE><DISPSIZE><SUFFIX>(),
+// encoded by custom code in get<FORMAT><DISPSIZE>Encoding() and decoded
+// by custom code in decode<TYPE><BITSIZE>Disp<DISPSIZE>Operand().
 // The address registers have BITSIZE bits and displacements have
 // DISPSIZE bits.  NUMOPS is the number of operands that make up an
 // address and OPERANDS lists the types of those operands using (ops ...).
@@ -74,6 +77,7 @@ class AddressingMode<string type, string bitsize, string dispsize,
     Operand<!cast<ValueType>("i"##bitsize)> {
   let PrintMethod = "print"##format##"Operand";
   let EncoderMethod = "get"##format##dispsize##"Encoding";
+  let DecoderMethod = "decode"##format##bitsize##"Disp"##dispsize##"Operand";
   let MIOperandInfo = operands;
   let ParserMatchClass =
     !cast<AddressAsmOperand>(format##bitsize##"Disp"##dispsize);
@@ -359,15 +363,18 @@ def PCRel32 : PCRelAsmOperand<"32">;
 // and multiplied by 2.
 def brtarget16 : PCRelOperand<OtherVT, PCRel16> {
   let EncoderMethod = "getPC16DBLEncoding";
+  let DecoderMethod = "decodePC16DBLOperand";
 }
 def brtarget32 : PCRelOperand<OtherVT, PCRel32> {
   let EncoderMethod = "getPC32DBLEncoding";
+  let DecoderMethod = "decodePC32DBLOperand";
 }
 
 // A PC-relative offset of a global value.  The offset is sign-extended
 // and multiplied by 2.
 def pcrel32 : PCRelAddress<i64, "pcrel32", PCRel32> {
   let EncoderMethod = "getPC32DBLEncoding";
+  let DecoderMethod = "decodePC32DBLOperand";
 }
 
 // A PC-relative offset of a global value when the value is used as a
@@ -375,10 +382,12 @@ def pcrel32 : PCRelAddress<i64, "pcrel32", PCRel32> {
 def pcrel16call : PCRelAddress<i64, "pcrel16call", PCRel16> {
   let PrintMethod = "printCallOperand";
   let EncoderMethod = "getPLT16DBLEncoding";
+  let DecoderMethod = "decodePC16DBLOperand";
 }
 def pcrel32call : PCRelAddress<i64, "pcrel32call", PCRel32> {
   let PrintMethod = "printCallOperand";
   let EncoderMethod = "getPLT32DBLEncoding";
+  let DecoderMethod = "decodePC32DBLOperand";
 }
 
 //===----------------------------------------------------------------------===//

llvm/test/MC/Disassembler/SystemZ/insn-a.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: a %r0, 0
+0x5a 0x00 0x00 0x00
+
+# CHECK: a %r0, 4095
+0x5a 0x00 0x0f 0xff
+
+# CHECK: a %r0, 0(%r1)
+0x5a 0x00 0x10 0x00
+
+# CHECK: a %r0, 0(%r15)
+0x5a 0x00 0xf0 0x00
+
+# CHECK: a %r0, 4095(%r1,%r15)
+0x5a 0x01 0xff 0xff
+
+# CHECK: a %r0, 4095(%r15,%r1)
+0x5a 0x0f 0x1f 0xff
+
+# CHECK: a %r15, 0
+0x5a 0xf0 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-adb.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: adb %f0, 0
+0xed 0x00 0x00 0x00 0x00 0x1a
+
+# CHECK: adb %f0, 4095
+0xed 0x00 0x0f 0xff 0x00 0x1a
+
+# CHECK: adb %f0, 0(%r1)
+0xed 0x00 0x10 0x00 0x00 0x1a
+
+# CHECK: adb %f0, 0(%r15)
+0xed 0x00 0xf0 0x00 0x00 0x1a
+
+# CHECK: adb %f0, 4095(%r1,%r15)
+0xed 0x01 0xff 0xff 0x00 0x1a
+
+# CHECK: adb %f0, 4095(%r15,%r1)
+0xed 0x0f 0x1f 0xff 0x00 0x1a
+
+# CHECK: adb %f15, 0
+0xed 0xf0 0x00 0x00 0x00 0x1a

llvm/test/MC/Disassembler/SystemZ/insn-adbr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: adbr %f0, %f0
+0xb3 0x1a 0x00 0x00
+
+# CHECK: adbr %f0, %f15
+0xb3 0x1a 0x00 0x0f
+
+# CHECK: adbr %f7, %f8
+0xb3 0x1a 0x00 0x78
+
+# CHECK: adbr %f15, %f0
+0xb3 0x1a 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-aeb.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: aeb %f0, 0
+0xed 0x00 0x00 0x00 0x00 0x0a
+
+# CHECK: aeb %f0, 4095
+0xed 0x00 0x0f 0xff 0x00 0x0a
+
+# CHECK: aeb %f0, 0(%r1)
+0xed 0x00 0x10 0x00 0x00 0x0a
+
+# CHECK: aeb %f0, 0(%r15)
+0xed 0x00 0xf0 0x00 0x00 0x0a
+
+# CHECK: aeb %f0, 4095(%r1,%r15)
+0xed 0x01 0xff 0xff 0x00 0x0a
+
+# CHECK: aeb %f0, 4095(%r15,%r1)
+0xed 0x0f 0x1f 0xff 0x00 0x0a
+
+# CHECK: aeb %f15, 0
+0xed 0xf0 0x00 0x00 0x00 0x0a

llvm/test/MC/Disassembler/SystemZ/insn-aebr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: aebr %f0, %f0
+0xb3 0x0a 0x00 0x00
+
+# CHECK: aebr %f0, %f15
+0xb3 0x0a 0x00 0x0f
+
+# CHECK: aebr %f7, %f8
+0xb3 0x0a 0x00 0x78
+
+# CHECK: aebr %f15, %f0
+0xb3 0x0a 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-afi.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: afi %r0, -2147483648
+0xc2 0x09 0x80 0x00 0x00 0x00
+
+# CHECK: afi %r0, -1
+0xc2 0x09 0xff 0xff 0xff 0xff
+
+# CHECK: afi %r0, 0
+0xc2 0x09 0x00 0x00 0x00 0x00
+
+# CHECK: afi %r0, 1
+0xc2 0x09 0x00 0x00 0x00 0x01
+
+# CHECK: afi %r0, 2147483647
+0xc2 0x09 0x7f 0xff 0xff 0xff
+
+# CHECK: afi %r15, 0
+0xc2 0xf9 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-ag.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: ag %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x08
+
+# CHECK: ag %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x08
+
+# CHECK: ag %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x08
+
+# CHECK: ag %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x08
+
+# CHECK: ag %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x08
+
+# CHECK: ag %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x08
+
+# CHECK: ag %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x08
+
+# CHECK: ag %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x08
+
+# CHECK: ag %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x08
+
+# CHECK: ag %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x08

llvm/test/MC/Disassembler/SystemZ/insn-agf.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: agf %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x18
+
+# CHECK: agf %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x18
+
+# CHECK: agf %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x18
+
+# CHECK: agf %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x18
+
+# CHECK: agf %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x18
+
+# CHECK: agf %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x18
+
+# CHECK: agf %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x18
+
+# CHECK: agf %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x18
+
+# CHECK: agf %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x18
+
+# CHECK: agf %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x18

llvm/test/MC/Disassembler/SystemZ/insn-agfi.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: agfi %r0, -2147483648
+0xc2 0x08 0x80 0x00 0x00 0x00
+
+# CHECK: agfi %r0, -1
+0xc2 0x08 0xff 0xff 0xff 0xff
+
+# CHECK: agfi %r0, 0
+0xc2 0x08 0x00 0x00 0x00 0x00
+
+# CHECK: agfi %r0, 1
+0xc2 0x08 0x00 0x00 0x00 0x01
+
+# CHECK: agfi %r0, 2147483647
+0xc2 0x08 0x7f 0xff 0xff 0xff
+
+# CHECK: agfi %r15, 0
+0xc2 0xf8 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-agfr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: agfr %r0, %r0
+0xb9 0x18 0x00 0x00
+
+# CHECK: agfr %r0, %r15
+0xb9 0x18 0x00 0x0f
+
+# CHECK: agfr %r15, %r0
+0xb9 0x18 0x00 0xf0
+
+# CHECK: agfr %r7, %r8
+0xb9 0x18 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-aghi.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: aghi %r0, -32768
+0xa7 0x0b 0x80 0x00
+
+# CHECK: aghi %r0, -1
+0xa7 0x0b 0xff 0xff
+
+# CHECK: aghi %r0, 0
+0xa7 0x0b 0x00 0x00
+
+# CHECK: aghi %r0, 1
+0xa7 0x0b 0x00 0x01
+
+# CHECK: aghi %r0, 32767
+0xa7 0x0b 0x7f 0xff
+
+# CHECK: aghi %r15, 0
+0xa7 0xfb 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-agr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: agr %r0, %r0
+0xb9 0x08 0x00 0x00
+
+# CHECK: agr %r0, %r15
+0xb9 0x08 0x00 0x0f
+
+# CHECK: agr %r15, %r0
+0xb9 0x08 0x00 0xf0
+
+# CHECK: agr %r7, %r8
+0xb9 0x08 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-agsi.txt

@@ -0,0 +1,39 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: agsi -524288, 0
+0xeb 0x00 0x00 0x00 0x80 0x7a
+
+# CHECK: agsi -1, 0
+0xeb 0x00 0x0f 0xff 0xff 0x7a
+
+# CHECK: agsi 0, 0
+0xeb 0x00 0x00 0x00 0x00 0x7a
+
+# CHECK: agsi 1, 0
+0xeb 0x00 0x00 0x01 0x00 0x7a
+
+# CHECK: agsi 524287, 0
+0xeb 0x00 0x0f 0xff 0x7f 0x7a
+
+# CHECK: agsi 0, -128
+0xeb 0x80 0x00 0x00 0x00 0x7a
+
+# CHECK: agsi 0, -1
+0xeb 0xff 0x00 0x00 0x00 0x7a
+
+# CHECK: agsi 0, 1
+0xeb 0x01 0x00 0x00 0x00 0x7a
+
+# CHECK: agsi 0, 127
+0xeb 0x7f 0x00 0x00 0x00 0x7a
+
+# CHECK: agsi 0(%r1), 42
+0xeb 0x2a 0x10 0x00 0x00 0x7a
+
+# CHECK: agsi 0(%r15), 42
+0xeb 0x2a 0xf0 0x00 0x00 0x7a
+
+# CHECK: agsi 524287(%r1), 42
+0xeb 0x2a 0x1f 0xff 0x7f 0x7a
+
+# CHECK: agsi 524287(%r15), 42
+0xeb 0x2a 0xff 0xff 0x7f 0x7a

llvm/test/MC/Disassembler/SystemZ/insn-ah.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: ah %r0, 0
+0x4a 0x00 0x00 0x00
+
+# CHECK: ah %r0, 4095
+0x4a 0x00 0x0f 0xff
+
+# CHECK: ah %r0, 0(%r1)
+0x4a 0x00 0x10 0x00
+
+# CHECK: ah %r0, 0(%r15)
+0x4a 0x00 0xf0 0x00
+
+# CHECK: ah %r0, 4095(%r1,%r15)
+0x4a 0x01 0xff 0xff
+
+# CHECK: ah %r0, 4095(%r15,%r1)
+0x4a 0x0f 0x1f 0xff
+
+# CHECK: ah %r15, 0
+0x4a 0xf0 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-ahi.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: ahi %r0, -32768
+0xa7 0x0a 0x80 0x00
+
+# CHECK: ahi %r0, -1
+0xa7 0x0a 0xff 0xff
+
+# CHECK: ahi %r0, 0
+0xa7 0x0a 0x00 0x00
+
+# CHECK: ahi %r0, 1
+0xa7 0x0a 0x00 0x01
+
+# CHECK: ahi %r0, 32767
+0xa7 0x0a 0x7f 0xff
+
+# CHECK: ahi %r15, 0
+0xa7 0xfa 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-ahy.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: ahy %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x7a
+
+# CHECK: ahy %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x7a
+
+# CHECK: ahy %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x7a
+
+# CHECK: ahy %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x7a
+
+# CHECK: ahy %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x7a
+
+# CHECK: ahy %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x7a
+
+# CHECK: ahy %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x7a
+
+# CHECK: ahy %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x7a
+
+# CHECK: ahy %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x7a
+
+# CHECK: ahy %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x7a

llvm/test/MC/Disassembler/SystemZ/insn-al.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: al %r0, 0
+0x5e 0x00 0x00 0x00
+
+# CHECK: al %r0, 4095
+0x5e 0x00 0x0f 0xff
+
+# CHECK: al %r0, 0(%r1)
+0x5e 0x00 0x10 0x00
+
+# CHECK: al %r0, 0(%r15)
+0x5e 0x00 0xf0 0x00
+
+# CHECK: al %r0, 4095(%r1,%r15)
+0x5e 0x01 0xff 0xff
+
+# CHECK: al %r0, 4095(%r15,%r1)
+0x5e 0x0f 0x1f 0xff
+
+# CHECK: al %r15, 0
+0x5e 0xf0 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-alc.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: alc %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x98
+
+# CHECK: alc %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x98
+
+# CHECK: alc %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x98
+
+# CHECK: alc %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x98
+
+# CHECK: alc %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x98
+
+# CHECK: alc %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x98
+
+# CHECK: alc %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x98
+
+# CHECK: alc %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x98
+
+# CHECK: alc %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x98
+
+# CHECK: alc %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x98

llvm/test/MC/Disassembler/SystemZ/insn-alcg.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: alcg %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x88
+
+# CHECK: alcg %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x88
+
+# CHECK: alcg %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x88
+
+# CHECK: alcg %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x88
+
+# CHECK: alcg %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x88
+
+# CHECK: alcg %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x88
+
+# CHECK: alcg %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x88
+
+# CHECK: alcg %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x88
+
+# CHECK: alcg %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x88
+
+# CHECK: alcg %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x88

llvm/test/MC/Disassembler/SystemZ/insn-alcgr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: alcgr %r0, %r0
+0xb9 0x88 0x00 0x00
+
+# CHECK: alcgr %r0, %r15
+0xb9 0x88 0x00 0x0f
+
+# CHECK: alcgr %r15, %r0
+0xb9 0x88 0x00 0xf0
+
+# CHECK: alcgr %r7, %r8
+0xb9 0x88 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-alcr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: alcr %r0, %r0
+0xb9 0x98 0x00 0x00
+
+# CHECK: alcr %r0, %r15
+0xb9 0x98 0x00 0x0f
+
+# CHECK: alcr %r15, %r0
+0xb9 0x98 0x00 0xf0
+
+# CHECK: alcr %r7, %r8
+0xb9 0x98 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-alfi.txt

@@ -0,0 +1,9 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: alfi %r0, 0
+0xc2 0x0b 0x00 0x00 0x00 0x00
+
+# CHECK: alfi %r0, 4294967295
+0xc2 0x0b 0xff 0xff 0xff 0xff
+
+# CHECK: alfi %r15, 0
+0xc2 0xfb 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-alg.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: alg %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x0a
+
+# CHECK: alg %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x0a
+
+# CHECK: alg %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x0a
+
+# CHECK: alg %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x0a
+
+# CHECK: alg %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x0a
+
+# CHECK: alg %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x0a
+
+# CHECK: alg %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x0a
+
+# CHECK: alg %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x0a
+
+# CHECK: alg %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x0a
+
+# CHECK: alg %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x0a

llvm/test/MC/Disassembler/SystemZ/insn-algf.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: algf %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x1a
+
+# CHECK: algf %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x1a
+
+# CHECK: algf %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x1a
+
+# CHECK: algf %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x1a
+
+# CHECK: algf %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x1a
+
+# CHECK: algf %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x1a
+
+# CHECK: algf %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x1a
+
+# CHECK: algf %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x1a
+
+# CHECK: algf %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x1a
+
+# CHECK: algf %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x1a

llvm/test/MC/Disassembler/SystemZ/insn-algfi.txt

@@ -0,0 +1,9 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: algfi %r0, 0
+0xc2 0x0a 0x00 0x00 0x00 0x00
+
+# CHECK: algfi %r0, 4294967295
+0xc2 0x0a 0xff 0xff 0xff 0xff
+
+# CHECK: algfi %r15, 0
+0xc2 0xfa 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-algfr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: algfr %r0, %r0
+0xb9 0x1a 0x00 0x00
+
+# CHECK: algfr %r0, %r15
+0xb9 0x1a 0x00 0x0f
+
+# CHECK: algfr %r15, %r0
+0xb9 0x1a 0x00 0xf0
+
+# CHECK: algfr %r7, %r8
+0xb9 0x1a 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-algr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: algr %r0, %r0
+0xb9 0x0a 0x00 0x00
+
+# CHECK: algr %r0, %r15
+0xb9 0x0a 0x00 0x0f
+
+# CHECK: algr %r15, %r0
+0xb9 0x0a 0x00 0xf0
+
+# CHECK: algr %r7, %r8
+0xb9 0x0a 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-alr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: alr %r0, %r0
+0x1e 0x00
+
+# CHECK: alr %r0, %r15
+0x1e 0x0f
+
+# CHECK: alr %r15, %r0
+0x1e 0xf0
+
+# CHECK: alr %r7, %r8
+0x1e 0x78

llvm/test/MC/Disassembler/SystemZ/insn-aly.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: aly %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x5e
+
+# CHECK: aly %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x5e
+
+# CHECK: aly %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x5e
+
+# CHECK: aly %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x5e
+
+# CHECK: aly %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x5e
+
+# CHECK: aly %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x5e
+
+# CHECK: aly %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x5e
+
+# CHECK: aly %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x5e
+
+# CHECK: aly %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x5e
+
+# CHECK: aly %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x5e

llvm/test/MC/Disassembler/SystemZ/insn-ar.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: ar %r0, %r0
+0x1a 0x00
+
+# CHECK: ar %r0, %r15
+0x1a 0x0f
+
+# CHECK: ar %r15, %r0
+0x1a 0xf0
+
+# CHECK: ar %r7, %r8
+0x1a 0x78

llvm/test/MC/Disassembler/SystemZ/insn-asi.txt

@@ -0,0 +1,39 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: asi -524288, 0
+0xeb 0x00 0x00 0x00 0x80 0x6a
+
+# CHECK: asi -1, 0
+0xeb 0x00 0x0f 0xff 0xff 0x6a
+
+# CHECK: asi 0, 0
+0xeb 0x00 0x00 0x00 0x00 0x6a
+
+# CHECK: asi 1, 0
+0xeb 0x00 0x00 0x01 0x00 0x6a
+
+# CHECK: asi 524287, 0
+0xeb 0x00 0x0f 0xff 0x7f 0x6a
+
+# CHECK: asi 0, -128
+0xeb 0x80 0x00 0x00 0x00 0x6a
+
+# CHECK: asi 0, -1
+0xeb 0xff 0x00 0x00 0x00 0x6a
+
+# CHECK: asi 0, 1
+0xeb 0x01 0x00 0x00 0x00 0x6a
+
+# CHECK: asi 0, 127
+0xeb 0x7f 0x00 0x00 0x00 0x6a
+
+# CHECK: asi 0(%r1), 42
+0xeb 0x2a 0x10 0x00 0x00 0x6a
+
+# CHECK: asi 0(%r15), 42
+0xeb 0x2a 0xf0 0x00 0x00 0x6a
+
+# CHECK: asi 524287(%r1), 42
+0xeb 0x2a 0x1f 0xff 0x7f 0x6a
+
+# CHECK: asi 524287(%r15), 42
+0xeb 0x2a 0xff 0xff 0x7f 0x6a

llvm/test/MC/Disassembler/SystemZ/insn-axbr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: axbr %f0, %f0
+0xb3 0x4a 0x00 0x00
+
+# CHECK: axbr %f0, %f13
+0xb3 0x4a 0x00 0x0d
+
+# CHECK: axbr %f8, %f8
+0xb3 0x4a 0x00 0x88
+
+# CHECK: axbr %f13, %f0
+0xb3 0x4a 0x00 0xd0

llvm/test/MC/Disassembler/SystemZ/insn-ay.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: ay %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x5a
+
+# CHECK: ay %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x5a
+
+# CHECK: ay %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x5a
+
+# CHECK: ay %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x5a
+
+# CHECK: ay %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x5a
+
+# CHECK: ay %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x5a
+
+# CHECK: ay %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x5a
+
+# CHECK: ay %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x5a
+
+# CHECK: ay %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x5a
+
+# CHECK: ay %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x5a

llvm/test/MC/Disassembler/SystemZ/insn-basr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: basr %r0, %r1
+0x0d 0x01
+
+# CHECK: basr %r0, %r15
+0x0d 0x0f
+
+# CHECK: basr %r14, %r9
+0x0d 0xe9
+
+# CHECK: basr %r15, %r1
+0x0d 0xf1

llvm/test/MC/Disassembler/SystemZ/insn-br.txt

@@ -0,0 +1,9 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: br %r1
+0x07 0xf1
+
+# CHECK: br %r14
+0x07 0xfe
+
+# CHECK: br %r15
+0x07 0xff

llvm/test/MC/Disassembler/SystemZ/insn-bras.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: bras %r0, 0x0
+0xa7 0x05 0x00 0x00
+
+# CHECK: bras %r14, 0x4
+0xa7 0xe5 0x00 0x00
+
+# CHECK: bras %r15, 0x8
+0xa7 0xf5 0x00 0x00
+
+# CHECK: bras %r0, 0xa
+0xa7 0x05 0xff 0xff
+
+# CHECK: bras %r14, 0xffffffffffff0010
+0xa7 0xe5 0x80 0x00
+
+# CHECK: bras %r15, 0x10012
+0xa7 0xf5 0x7f 0xff

llvm/test/MC/Disassembler/SystemZ/insn-brasl.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: brasl %r0, 0x0
+0xc0 0x05 0x00 0x00 0x00 0x00
+
+# CHECK: brasl %r14, 0x6
+0xc0 0xe5 0x00 0x00 0x00 0x00
+
+# CHECK: brasl %r15, 0xc
+0xc0 0xf5 0x00 0x00 0x00 0x00
+
+# CHECK: brasl %r0, 0x10
+0xc0 0x05 0xff 0xff 0xff 0xff
+
+# CHECK: brasl %r14, 0xffffffff00000018
+0xc0 0xe5 0x80 0x00 0x00 0x00
+
+# CHECK: brasl %r15, 0x10000001c
+0xc0 0xf5 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-brc.txt

@@ -0,0 +1,66 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: brc 0, 0x0
+0xa7 0x04 0x00 0x00
+
+# CHECK: jo 0x4
+0xa7 0x14 0x00 0x00
+
+# CHECK: jh 0x8
+0xa7 0x24 0x00 0x00
+
+# CHECK: jnle 0xc
+0xa7 0x34 0x00 0x00
+
+# CHECK: jl 0x10
+0xa7 0x44 0x00 0x00
+
+# CHECK: jnhe 0x14
+0xa7 0x54 0x00 0x00
+
+# CHECK: jlh 0x18
+0xa7 0x64 0x00 0x00
+
+# CHECK: jne 0x1c
+0xa7 0x74 0x00 0x00
+
+# CHECK: je 0x20
+0xa7 0x84 0x00 0x00
+
+# CHECK: jnlh 0x24
+0xa7 0x94 0x00 0x00
+
+# CHECK: jhe 0x28
+0xa7 0xa4 0x00 0x00
+
+# CHECK: jnl 0x2c
+0xa7 0xb4 0x00 0x00
+
+# CHECK: jle 0x30
+0xa7 0xc4 0x00 0x00
+
+# CHECK: jnh 0x34
+0xa7 0xd4 0x00 0x00
+
+# CHECK: jno 0x38
+0xa7 0xe4 0x00 0x00
+
+# CHECK: j 0x3c
+0xa7 0xf4 0x00 0x00
+
+# CHECK: brc 0, 0x3e
+0xa7 0x04 0xff 0xff
+
+# CHECK: brc 0, 0xffffffffffff0044
+0xa7 0x04 0x80 0x00
+
+# CHECK: brc 0, 0x10046
+0xa7 0x04 0x7f 0xff
+
+# CHECK: j 0x4a
+0xa7 0xf4 0xff 0xff
+
+# CHECK: j 0xffffffffffff0050
+0xa7 0xf4 0x80 0x00
+
+# CHECK: j 0x10052
+0xa7 0xf4 0x7f 0xff

llvm/test/MC/Disassembler/SystemZ/insn-brcl.txt

@@ -0,0 +1,66 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: brcl 0, 0x0
+0xc0 0x04 0x00 0x00 0x00 0x00
+
+# CHECK: jgo 0x6
+0xc0 0x14 0x00 0x00 0x00 0x00
+
+# CHECK: jgh 0xc
+0xc0 0x24 0x00 0x00 0x00 0x00
+
+# CHECK: jgnle 0x12
+0xc0 0x34 0x00 0x00 0x00 0x00
+
+# CHECK: jgl 0x18
+0xc0 0x44 0x00 0x00 0x00 0x00
+
+# CHECK: jgnhe 0x1e
+0xc0 0x54 0x00 0x00 0x00 0x00
+
+# CHECK: jglh 0x24
+0xc0 0x64 0x00 0x00 0x00 0x00
+
+# CHECK: jgne 0x2a
+0xc0 0x74 0x00 0x00 0x00 0x00
+
+# CHECK: jge 0x30
+0xc0 0x84 0x00 0x00 0x00 0x00
+
+# CHECK: jgnlh 0x36
+0xc0 0x94 0x00 0x00 0x00 0x00
+
+# CHECK: jghe 0x3c
+0xc0 0xa4 0x00 0x00 0x00 0x00
+
+# CHECK: jgnl 0x42
+0xc0 0xb4 0x00 0x00 0x00 0x00
+
+# CHECK: jgle 0x48
+0xc0 0xc4 0x00 0x00 0x00 0x00
+
+# CHECK: jgnh 0x4e
+0xc0 0xd4 0x00 0x00 0x00 0x00
+
+# CHECK: jgno 0x54
+0xc0 0xe4 0x00 0x00 0x00 0x00
+
+# CHECK: jg 0x5a
+0xc0 0xf4 0x00 0x00 0x00 0x00
+
+# CHECK: brcl 0, 0x5e
+0xc0 0x04 0xff 0xff 0xff 0xff
+
+# CHECK: brcl 0, 0xffffffff00000066
+0xc0 0x04 0x80 0x00 0x00 0x00
+
+# CHECK: brcl 0, 0x10000006a
+0xc0 0x04 0x7f 0xff 0xff 0xff
+
+# CHECK: jg 0x70
+0xc0 0xf4 0xff 0xff 0xff 0xff
+
+# CHECK: jg 0xffffffff00000078
+0xc0 0xf4 0x80 0x00 0x00 0x00
+
+# CHECK: jg 0x10000007c
+0xc0 0xf4 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-c.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: c %r0, 0
+0x59 0x00 0x00 0x00
+
+# CHECK: c %r0, 4095
+0x59 0x00 0x0f 0xff
+
+# CHECK: c %r0, 0(%r1)
+0x59 0x00 0x10 0x00
+
+# CHECK: c %r0, 0(%r15)
+0x59 0x00 0xf0 0x00
+
+# CHECK: c %r0, 4095(%r1,%r15)
+0x59 0x01 0xff 0xff
+
+# CHECK: c %r0, 4095(%r15,%r1)
+0x59 0x0f 0x1f 0xff
+
+# CHECK: c %r15, 0
+0x59 0xf0 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-cdb.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cdb %f0, 0
+0xed 0x00 0x00 0x00 0x00 0x19
+
+# CHECK: cdb %f0, 4095
+0xed 0x00 0x0f 0xff 0x00 0x19
+
+# CHECK: cdb %f0, 0(%r1)
+0xed 0x00 0x10 0x00 0x00 0x19
+
+# CHECK: cdb %f0, 0(%r15)
+0xed 0x00 0xf0 0x00 0x00 0x19
+
+# CHECK: cdb %f0, 4095(%r1,%r15)
+0xed 0x01 0xff 0xff 0x00 0x19
+
+# CHECK: cdb %f0, 4095(%r15,%r1)
+0xed 0x0f 0x1f 0xff 0x00 0x19
+
+# CHECK: cdb %f15, 0
+0xed 0xf0 0x00 0x00 0x00 0x19

llvm/test/MC/Disassembler/SystemZ/insn-cdbr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cdbr %f0, %f0
+0xb3 0x19 0x00 0x00
+
+# CHECK: cdbr %f0, %f15
+0xb3 0x19 0x00 0x0f
+
+# CHECK: cdbr %f7, %f8
+0xb3 0x19 0x00 0x78
+
+# CHECK: cdbr %f15, %f0
+0xb3 0x19 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-cdfbr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cdfbr %f0, %r0
+0xb3 0x95 0x00 0x00
+
+# CHECK: cdfbr %f0, %r15
+0xb3 0x95 0x00 0x0f
+
+# CHECK: cdfbr %f15, %r0
+0xb3 0x95 0x00 0xf0
+
+# CHECK: cdfbr %f7, %r8
+0xb3 0x95 0x00 0x78
+
+# CHECK: cdfbr %f15, %r15
+0xb3 0x95 0x00 0xff

llvm/test/MC/Disassembler/SystemZ/insn-cdgbr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cdgbr %f0, %r0
+0xb3 0xa5 0x00 0x00
+
+# CHECK: cdgbr %f0, %r15
+0xb3 0xa5 0x00 0x0f
+
+# CHECK: cdgbr %f15, %r0
+0xb3 0xa5 0x00 0xf0
+
+# CHECK: cdgbr %f7, %r8
+0xb3 0xa5 0x00 0x78
+
+# CHECK: cdgbr %f15, %r15
+0xb3 0xa5 0x00 0xff

llvm/test/MC/Disassembler/SystemZ/insn-ceb.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: ceb %f0, 0
+0xed 0x00 0x00 0x00 0x00 0x09
+
+# CHECK: ceb %f0, 4095
+0xed 0x00 0x0f 0xff 0x00 0x09
+
+# CHECK: ceb %f0, 0(%r1)
+0xed 0x00 0x10 0x00 0x00 0x09
+
+# CHECK: ceb %f0, 0(%r15)
+0xed 0x00 0xf0 0x00 0x00 0x09
+
+# CHECK: ceb %f0, 4095(%r1,%r15)
+0xed 0x01 0xff 0xff 0x00 0x09
+
+# CHECK: ceb %f0, 4095(%r15,%r1)
+0xed 0x0f 0x1f 0xff 0x00 0x09
+
+# CHECK: ceb %f15, 0
+0xed 0xf0 0x00 0x00 0x00 0x09

llvm/test/MC/Disassembler/SystemZ/insn-cebr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cebr %f0, %f0
+0xb3 0x09 0x00 0x00
+
+# CHECK: cebr %f0, %f15
+0xb3 0x09 0x00 0x0f
+
+# CHECK: cebr %f7, %f8
+0xb3 0x09 0x00 0x78
+
+# CHECK: cebr %f15, %f0
+0xb3 0x09 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-cefbr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cefbr %f0, %r0
+0xb3 0x94 0x00 0x00
+
+# CHECK: cefbr %f0, %r15
+0xb3 0x94 0x00 0x0f
+
+# CHECK: cefbr %f15, %r0
+0xb3 0x94 0x00 0xf0
+
+# CHECK: cefbr %f7, %r8
+0xb3 0x94 0x00 0x78
+
+# CHECK: cefbr %f15, %r15
+0xb3 0x94 0x00 0xff

llvm/test/MC/Disassembler/SystemZ/insn-cegbr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cegbr %f0, %r0
+0xb3 0xa4 0x00 0x00
+
+# CHECK: cegbr %f0, %r15
+0xb3 0xa4 0x00 0x0f
+
+# CHECK: cegbr %f15, %r0
+0xb3 0xa4 0x00 0xf0
+
+# CHECK: cegbr %f7, %r8
+0xb3 0xa4 0x00 0x78
+
+# CHECK: cegbr %f15, %r15
+0xb3 0xa4 0x00 0xff

llvm/test/MC/Disassembler/SystemZ/insn-cfdbr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cfdbr %r0, 0, %f0
+0xb3 0x99 0x00 0x00
+
+# CHECK: cfdbr %r0, 0, %f15
+0xb3 0x99 0x00 0x0f
+
+# CHECK: cfdbr %r0, 15, %f0
+0xb3 0x99 0xf0 0x00
+
+# CHECK: cfdbr %r4, 5, %f6
+0xb3 0x99 0x50 0x46
+
+# CHECK: cfdbr %r15, 0, %f0
+0xb3 0x99 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-cfebr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cfebr %r0, 0, %f0
+0xb3 0x98 0x00 0x00
+
+# CHECK: cfebr %r0, 0, %f15
+0xb3 0x98 0x00 0x0f
+
+# CHECK: cfebr %r0, 15, %f0
+0xb3 0x98 0xf0 0x00
+
+# CHECK: cfebr %r4, 5, %f6
+0xb3 0x98 0x50 0x46
+
+# CHECK: cfebr %r15, 0, %f0
+0xb3 0x98 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-cfi.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cfi %r0, -2147483648
+0xc2 0x0d 0x80 0x00 0x00 0x00
+
+# CHECK: cfi %r0, -1
+0xc2 0x0d 0xff 0xff 0xff 0xff
+
+# CHECK: cfi %r0, 0
+0xc2 0x0d 0x00 0x00 0x00 0x00
+
+# CHECK: cfi %r0, 1
+0xc2 0x0d 0x00 0x00 0x00 0x01
+
+# CHECK: cfi %r0, 2147483647
+0xc2 0x0d 0x7f 0xff 0xff 0xff
+
+# CHECK: cfi %r15, 0
+0xc2 0xfd 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-cfxbr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cfxbr %r0, 0, %f0
+0xb3 0x9a 0x00 0x00
+
+# CHECK: cfxbr %r0, 0, %f13
+0xb3 0x9a 0x00 0x0d
+
+# CHECK: cfxbr %r0, 15, %f0
+0xb3 0x9a 0xf0 0x00
+
+# CHECK: cfxbr %r4, 5, %f8
+0xb3 0x9a 0x50 0x48
+
+# CHECK: cfxbr %r15, 0, %f0
+0xb3 0x9a 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-cg.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cg %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x20
+
+# CHECK: cg %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x20
+
+# CHECK: cg %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x20
+
+# CHECK: cg %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x20
+
+# CHECK: cg %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x20
+
+# CHECK: cg %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x20
+
+# CHECK: cg %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x20
+
+# CHECK: cg %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x20
+
+# CHECK: cg %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x20
+
+# CHECK: cg %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x20

llvm/test/MC/Disassembler/SystemZ/insn-cgdbr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgdbr %r0, 0, %f0
+0xb3 0xa9 0x00 0x00
+
+# CHECK: cgdbr %r0, 0, %f15
+0xb3 0xa9 0x00 0x0f
+
+# CHECK: cgdbr %r0, 15, %f0
+0xb3 0xa9 0xf0 0x00
+
+# CHECK: cgdbr %r4, 5, %f6
+0xb3 0xa9 0x50 0x46
+
+# CHECK: cgdbr %r15, 0, %f0
+0xb3 0xa9 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-cgebr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgebr %r0, 0, %f0
+0xb3 0xa8 0x00 0x00
+
+# CHECK: cgebr %r0, 0, %f15
+0xb3 0xa8 0x00 0x0f
+
+# CHECK: cgebr %r0, 15, %f0
+0xb3 0xa8 0xf0 0x00
+
+# CHECK: cgebr %r4, 5, %f6
+0xb3 0xa8 0x50 0x46
+
+# CHECK: cgebr %r15, 0, %f0
+0xb3 0xa8 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-cgf.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgf %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x30
+
+# CHECK: cgf %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x30
+
+# CHECK: cgf %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x30
+
+# CHECK: cgf %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x30
+
+# CHECK: cgf %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x30
+
+# CHECK: cgf %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x30
+
+# CHECK: cgf %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x30
+
+# CHECK: cgf %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x30
+
+# CHECK: cgf %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x30
+
+# CHECK: cgf %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x30

llvm/test/MC/Disassembler/SystemZ/insn-cgfi.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgfi %r0, -2147483648
+0xc2 0x0c 0x80 0x00 0x00 0x00
+
+# CHECK: cgfi %r0, -1
+0xc2 0x0c 0xff 0xff 0xff 0xff
+
+# CHECK: cgfi %r0, 0
+0xc2 0x0c 0x00 0x00 0x00 0x00
+
+# CHECK: cgfi %r0, 1
+0xc2 0x0c 0x00 0x00 0x00 0x01
+
+# CHECK: cgfi %r0, 2147483647
+0xc2 0x0c 0x7f 0xff 0xff 0xff
+
+# CHECK: cgfi %r15, 0
+0xc2 0xfc 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-cgfr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgfr %r0, %r0
+0xb9 0x30 0x00 0x00
+
+# CHECK: cgfr %r0, %r15
+0xb9 0x30 0x00 0x0f
+
+# CHECK: cgfr %r15, %r0
+0xb9 0x30 0x00 0xf0
+
+# CHECK: cgfr %r7, %r8
+0xb9 0x30 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-cgfrl.txt

@@ -0,0 +1,24 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgfrl %r0, 0x0
+0xc6 0x0c 0x00 0x00 0x00 0x00
+
+# CHECK: cgfrl %r15, 0x6
+0xc6 0xfc 0x00 0x00 0x00 0x00
+
+# CHECK: cgfrl %r0, 0xa
+0xc6 0x0c 0xff 0xff 0xff 0xff
+
+# CHECK: cgfrl %r15, 0x10
+0xc6 0xfc 0xff 0xff 0xff 0xff
+
+# CHECK: cgfrl %r0, 0xffffffff00000018
+0xc6 0x0c 0x80 0x00 0x00 0x00
+
+# CHECK: cgfrl %r15, 0xffffffff0000001e
+0xc6 0xfc 0x80 0x00 0x00 0x00
+
+# CHECK: cgfrl %r0, 0x100000022
+0xc6 0x0c 0x7f 0xff 0xff 0xff
+
+# CHECK: cgfrl %r15, 0x100000028
+0xc6 0xfc 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-cgh.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgh %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x34
+
+# CHECK: cgh %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x34
+
+# CHECK: cgh %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x34
+
+# CHECK: cgh %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x34
+
+# CHECK: cgh %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x34
+
+# CHECK: cgh %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x34
+
+# CHECK: cgh %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x34
+
+# CHECK: cgh %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x34
+
+# CHECK: cgh %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x34
+
+# CHECK: cgh %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x34

llvm/test/MC/Disassembler/SystemZ/insn-cghi.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cghi %r0, -32768
+0xa7 0x0f 0x80 0x00
+
+# CHECK: cghi %r0, -1
+0xa7 0x0f 0xff 0xff
+
+# CHECK: cghi %r0, 0
+0xa7 0x0f 0x00 0x00
+
+# CHECK: cghi %r0, 1
+0xa7 0x0f 0x00 0x01
+
+# CHECK: cghi %r0, 32767
+0xa7 0x0f 0x7f 0xff
+
+# CHECK: cghi %r15, 0
+0xa7 0xff 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-cghrl.txt

@@ -0,0 +1,24 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cghrl %r0, 0x0
+0xc6 0x04 0x00 0x00 0x00 0x00
+
+# CHECK: cghrl %r15, 0x6
+0xc6 0xf4 0x00 0x00 0x00 0x00
+
+# CHECK: cghrl %r0, 0xa
+0xc6 0x04 0xff 0xff 0xff 0xff
+
+# CHECK: cghrl %r15, 0x10
+0xc6 0xf4 0xff 0xff 0xff 0xff
+
+# CHECK: cghrl %r0, 0xffffffff00000018
+0xc6 0x04 0x80 0x00 0x00 0x00
+
+# CHECK: cghrl %r15, 0xffffffff0000001e
+0xc6 0xf4 0x80 0x00 0x00 0x00
+
+# CHECK: cghrl %r0, 0x100000022
+0xc6 0x04 0x7f 0xff 0xff 0xff
+
+# CHECK: cghrl %r15, 0x100000028
+0xc6 0xf4 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-cghsi.txt

@@ -0,0 +1,33 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cghsi 0, 0
+0xe5 0x58 0x00 0x00 0x00 0x00
+
+# CHECK: cghsi 4095, 0
+0xe5 0x58 0x0f 0xff 0x00 0x00
+
+# CHECK: cghsi 0, -32768
+0xe5 0x58 0x00 0x00 0x80 0x00
+
+# CHECK: cghsi 0, -1
+0xe5 0x58 0x00 0x00 0xff 0xff
+
+# CHECK: cghsi 0, 0
+0xe5 0x58 0x00 0x00 0x00 0x00
+
+# CHECK: cghsi 0, 1
+0xe5 0x58 0x00 0x00 0x00 0x01
+
+# CHECK: cghsi 0, 32767
+0xe5 0x58 0x00 0x00 0x7f 0xff
+
+# CHECK: cghsi 0(%r1), 42
+0xe5 0x58 0x10 0x00 0x00 0x2a
+
+# CHECK: cghsi 0(%r15), 42
+0xe5 0x58 0xf0 0x00 0x00 0x2a
+
+# CHECK: cghsi 4095(%r1), 42
+0xe5 0x58 0x1f 0xff 0x00 0x2a
+
+# CHECK: cghsi 4095(%r15), 42
+0xe5 0x58 0xff 0xff 0x00 0x2a

llvm/test/MC/Disassembler/SystemZ/insn-cgr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgr %r0, %r0
+0xb9 0x20 0x00 0x00
+
+# CHECK: cgr %r0, %r15
+0xb9 0x20 0x00 0x0f
+
+# CHECK: cgr %r15, %r0
+0xb9 0x20 0x00 0xf0
+
+# CHECK: cgr %r7, %r8
+0xb9 0x20 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-cgrl.txt

@@ -0,0 +1,24 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgrl %r0, 0x0
+0xc6 0x08 0x00 0x00 0x00 0x00
+
+# CHECK: cgrl %r15, 0x6
+0xc6 0xf8 0x00 0x00 0x00 0x00
+
+# CHECK: cgrl %r0, 0xa
+0xc6 0x08 0xff 0xff 0xff 0xff
+
+# CHECK: cgrl %r15, 0x10
+0xc6 0xf8 0xff 0xff 0xff 0xff
+
+# CHECK: cgrl %r0, 0xffffffff00000018
+0xc6 0x08 0x80 0x00 0x00 0x00
+
+# CHECK: cgrl %r15, 0xffffffff0000001e
+0xc6 0xf8 0x80 0x00 0x00 0x00
+
+# CHECK: cgrl %r0, 0x100000022
+0xc6 0x08 0x7f 0xff 0xff 0xff
+
+# CHECK: cgrl %r15, 0x100000028
+0xc6 0xf8 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-cgxbr.txt

@@ -0,0 +1,15 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cgxbr %r0, 0, %f0
+0xb3 0xaa 0x00 0x00
+
+# CHECK: cgxbr %r0, 0, %f13
+0xb3 0xaa 0x00 0x0d
+
+# CHECK: cgxbr %r0, 15, %f0
+0xb3 0xaa 0xf0 0x00
+
+# CHECK: cgxbr %r4, 5, %f8
+0xb3 0xaa 0x50 0x48
+
+# CHECK: cgxbr %r15, 0, %f0
+0xb3 0xaa 0x00 0xf0

llvm/test/MC/Disassembler/SystemZ/insn-ch.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: ch %r0, 0
+0x49 0x00 0x00 0x00
+
+# CHECK: ch %r0, 4095
+0x49 0x00 0x0f 0xff
+
+# CHECK: ch %r0, 0(%r1)
+0x49 0x00 0x10 0x00
+
+# CHECK: ch %r0, 0(%r15)
+0x49 0x00 0xf0 0x00
+
+# CHECK: ch %r0, 4095(%r1,%r15)
+0x49 0x01 0xff 0xff
+
+# CHECK: ch %r0, 4095(%r15,%r1)
+0x49 0x0f 0x1f 0xff
+
+# CHECK: ch %r15, 0
+0x49 0xf0 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-chhsi.txt

@@ -0,0 +1,33 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: chhsi 0, 0
+0xe5 0x54 0x00 0x00 0x00 0x00
+
+# CHECK: chhsi 4095, 0
+0xe5 0x54 0x0f 0xff 0x00 0x00
+
+# CHECK: chhsi 0, -32768
+0xe5 0x54 0x00 0x00 0x80 0x00
+
+# CHECK: chhsi 0, -1
+0xe5 0x54 0x00 0x00 0xff 0xff
+
+# CHECK: chhsi 0, 0
+0xe5 0x54 0x00 0x00 0x00 0x00
+
+# CHECK: chhsi 0, 1
+0xe5 0x54 0x00 0x00 0x00 0x01
+
+# CHECK: chhsi 0, 32767
+0xe5 0x54 0x00 0x00 0x7f 0xff
+
+# CHECK: chhsi 0(%r1), 42
+0xe5 0x54 0x10 0x00 0x00 0x2a
+
+# CHECK: chhsi 0(%r15), 42
+0xe5 0x54 0xf0 0x00 0x00 0x2a
+
+# CHECK: chhsi 4095(%r1), 42
+0xe5 0x54 0x1f 0xff 0x00 0x2a
+
+# CHECK: chhsi 4095(%r15), 42
+0xe5 0x54 0xff 0xff 0x00 0x2a

llvm/test/MC/Disassembler/SystemZ/insn-chi.txt

@@ -0,0 +1,18 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: chi %r0, -32768
+0xa7 0x0e 0x80 0x00
+
+# CHECK: chi %r0, -1
+0xa7 0x0e 0xff 0xff
+
+# CHECK: chi %r0, 0
+0xa7 0x0e 0x00 0x00
+
+# CHECK: chi %r0, 1
+0xa7 0x0e 0x00 0x01
+
+# CHECK: chi %r0, 32767
+0xa7 0x0e 0x7f 0xff
+
+# CHECK: chi %r15, 0
+0xa7 0xfe 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-chrl.txt

@@ -0,0 +1,24 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: chrl %r0, 0x0
+0xc6 0x05 0x00 0x00 0x00 0x00
+
+# CHECK: chrl %r15, 0x6
+0xc6 0xf5 0x00 0x00 0x00 0x00
+
+# CHECK: chrl %r0, 0xa
+0xc6 0x05 0xff 0xff 0xff 0xff
+
+# CHECK: chrl %r15, 0x10
+0xc6 0xf5 0xff 0xff 0xff 0xff
+
+# CHECK: chrl %r0, 0xffffffff00000018
+0xc6 0x05 0x80 0x00 0x00 0x00
+
+# CHECK: chrl %r15, 0xffffffff0000001e
+0xc6 0xf5 0x80 0x00 0x00 0x00
+
+# CHECK: chrl %r0, 0x100000022
+0xc6 0x05 0x7f 0xff 0xff 0xff
+
+# CHECK: chrl %r15, 0x100000028
+0xc6 0xf5 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-chsi.txt

@@ -0,0 +1,33 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: chsi 0, 0
+0xe5 0x5c 0x00 0x00 0x00 0x00
+
+# CHECK: chsi 4095, 0
+0xe5 0x5c 0x0f 0xff 0x00 0x00
+
+# CHECK: chsi 0, -32768
+0xe5 0x5c 0x00 0x00 0x80 0x00
+
+# CHECK: chsi 0, -1
+0xe5 0x5c 0x00 0x00 0xff 0xff
+
+# CHECK: chsi 0, 0
+0xe5 0x5c 0x00 0x00 0x00 0x00
+
+# CHECK: chsi 0, 1
+0xe5 0x5c 0x00 0x00 0x00 0x01
+
+# CHECK: chsi 0, 32767
+0xe5 0x5c 0x00 0x00 0x7f 0xff
+
+# CHECK: chsi 0(%r1), 42
+0xe5 0x5c 0x10 0x00 0x00 0x2a
+
+# CHECK: chsi 0(%r15), 42
+0xe5 0x5c 0xf0 0x00 0x00 0x2a
+
+# CHECK: chsi 4095(%r1), 42
+0xe5 0x5c 0x1f 0xff 0x00 0x2a
+
+# CHECK: chsi 4095(%r15), 42
+0xe5 0x5c 0xff 0xff 0x00 0x2a

llvm/test/MC/Disassembler/SystemZ/insn-chy.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: chy %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x79
+
+# CHECK: chy %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x79
+
+# CHECK: chy %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x79
+
+# CHECK: chy %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x79
+
+# CHECK: chy %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x79
+
+# CHECK: chy %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x79
+
+# CHECK: chy %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x79
+
+# CHECK: chy %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x79
+
+# CHECK: chy %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x79
+
+# CHECK: chy %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x79

llvm/test/MC/Disassembler/SystemZ/insn-cl.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cl %r0, 0
+0x55 0x00 0x00 0x00
+
+# CHECK: cl %r0, 4095
+0x55 0x00 0x0f 0xff
+
+# CHECK: cl %r0, 0(%r1)
+0x55 0x00 0x10 0x00
+
+# CHECK: cl %r0, 0(%r15)
+0x55 0x00 0xf0 0x00
+
+# CHECK: cl %r0, 4095(%r1,%r15)
+0x55 0x01 0xff 0xff
+
+# CHECK: cl %r0, 4095(%r15,%r1)
+0x55 0x0f 0x1f 0xff
+
+# CHECK: cl %r15, 0
+0x55 0xf0 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-clfhsi.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clfhsi 0, 0
+0xe5 0x5d 0x00 0x00 0x00 0x00
+
+# CHECK: clfhsi 4095, 0
+0xe5 0x5d 0x0f 0xff 0x00 0x00
+
+# CHECK: clfhsi 0, 65535
+0xe5 0x5d 0x00 0x00 0xff 0xff
+
+# CHECK: clfhsi 0(%r1), 42
+0xe5 0x5d 0x10 0x00 0x00 0x2a
+
+# CHECK: clfhsi 0(%r15), 42
+0xe5 0x5d 0xf0 0x00 0x00 0x2a
+
+# CHECK: clfhsi 4095(%r1), 42
+0xe5 0x5d 0x1f 0xff 0x00 0x2a
+
+# CHECK: clfhsi 4095(%r15), 42
+0xe5 0x5d 0xff 0xff 0x00 0x2a

llvm/test/MC/Disassembler/SystemZ/insn-clfi.txt

@@ -0,0 +1,9 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clfi %r0, 0
+0xc2 0x0f 0x00 0x00 0x00 0x00
+
+# CHECK: clfi %r0, 4294967295
+0xc2 0x0f 0xff 0xff 0xff 0xff
+
+# CHECK: clfi %r15, 0
+0xc2 0xff 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-clg.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clg %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x21
+
+# CHECK: clg %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x21
+
+# CHECK: clg %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x21
+
+# CHECK: clg %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x21
+
+# CHECK: clg %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x21
+
+# CHECK: clg %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x21
+
+# CHECK: clg %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x21
+
+# CHECK: clg %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x21
+
+# CHECK: clg %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x21
+
+# CHECK: clg %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x21

llvm/test/MC/Disassembler/SystemZ/insn-clgf.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clgf %r0, -524288
+0xe3 0x00 0x00 0x00 0x80 0x31
+
+# CHECK: clgf %r0, -1
+0xe3 0x00 0x0f 0xff 0xff 0x31
+
+# CHECK: clgf %r0, 0
+0xe3 0x00 0x00 0x00 0x00 0x31
+
+# CHECK: clgf %r0, 1
+0xe3 0x00 0x00 0x01 0x00 0x31
+
+# CHECK: clgf %r0, 524287
+0xe3 0x00 0x0f 0xff 0x7f 0x31
+
+# CHECK: clgf %r0, 0(%r1)
+0xe3 0x00 0x10 0x00 0x00 0x31
+
+# CHECK: clgf %r0, 0(%r15)
+0xe3 0x00 0xf0 0x00 0x00 0x31
+
+# CHECK: clgf %r0, 524287(%r1,%r15)
+0xe3 0x01 0xff 0xff 0x7f 0x31
+
+# CHECK: clgf %r0, 524287(%r15,%r1)
+0xe3 0x0f 0x1f 0xff 0x7f 0x31
+
+# CHECK: clgf %r15, 0
+0xe3 0xf0 0x00 0x00 0x00 0x31

llvm/test/MC/Disassembler/SystemZ/insn-clgfi.txt

@@ -0,0 +1,9 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clgfi %r0, 0
+0xc2 0x0e 0x00 0x00 0x00 0x00
+
+# CHECK: clgfi %r0, 4294967295
+0xc2 0x0e 0xff 0xff 0xff 0xff
+
+# CHECK: clgfi %r15, 0
+0xc2 0xfe 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-clgfr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clgfr %r0, %r0
+0xb9 0x31 0x00 0x00
+
+# CHECK: clgfr %r0, %r15
+0xb9 0x31 0x00 0x0f
+
+# CHECK: clgfr %r15, %r0
+0xb9 0x31 0x00 0xf0
+
+# CHECK: clgfr %r7, %r8
+0xb9 0x31 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-clgfrl.txt

@@ -0,0 +1,24 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clgfrl %r0, 0x0
+0xc6 0x0e 0x00 0x00 0x00 0x00
+
+# CHECK: clgfrl %r15, 0x6
+0xc6 0xfe 0x00 0x00 0x00 0x00
+
+# CHECK: clgfrl %r0, 0xa
+0xc6 0x0e 0xff 0xff 0xff 0xff
+
+# CHECK: clgfrl %r15, 0x10
+0xc6 0xfe 0xff 0xff 0xff 0xff
+
+# CHECK: clgfrl %r0, 0xffffffff00000018
+0xc6 0x0e 0x80 0x00 0x00 0x00
+
+# CHECK: clgfrl %r15, 0xffffffff0000001e
+0xc6 0xfe 0x80 0x00 0x00 0x00
+
+# CHECK: clgfrl %r0, 0x100000022
+0xc6 0x0e 0x7f 0xff 0xff 0xff
+
+# CHECK: clgfrl %r15, 0x100000028
+0xc6 0xfe 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-clghrl.txt

@@ -0,0 +1,24 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clghrl %r0, 0x0
+0xc6 0x06 0x00 0x00 0x00 0x00
+
+# CHECK: clghrl %r15, 0x6
+0xc6 0xf6 0x00 0x00 0x00 0x00
+
+# CHECK: clghrl %r0, 0xa
+0xc6 0x06 0xff 0xff 0xff 0xff
+
+# CHECK: clghrl %r15, 0x10
+0xc6 0xf6 0xff 0xff 0xff 0xff
+
+# CHECK: clghrl %r0, 0xffffffff00000018
+0xc6 0x06 0x80 0x00 0x00 0x00
+
+# CHECK: clghrl %r15, 0xffffffff0000001e
+0xc6 0xf6 0x80 0x00 0x00 0x00
+
+# CHECK: clghrl %r0, 0x100000022
+0xc6 0x06 0x7f 0xff 0xff 0xff
+
+# CHECK: clghrl %r15, 0x100000028
+0xc6 0xf6 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-clghsi.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clghsi 0, 0
+0xe5 0x59 0x00 0x00 0x00 0x00
+
+# CHECK: clghsi 4095, 0
+0xe5 0x59 0x0f 0xff 0x00 0x00
+
+# CHECK: clghsi 0, 65535
+0xe5 0x59 0x00 0x00 0xff 0xff
+
+# CHECK: clghsi 0(%r1), 42
+0xe5 0x59 0x10 0x00 0x00 0x2a
+
+# CHECK: clghsi 0(%r15), 42
+0xe5 0x59 0xf0 0x00 0x00 0x2a
+
+# CHECK: clghsi 4095(%r1), 42
+0xe5 0x59 0x1f 0xff 0x00 0x2a
+
+# CHECK: clghsi 4095(%r15), 42
+0xe5 0x59 0xff 0xff 0x00 0x2a

llvm/test/MC/Disassembler/SystemZ/insn-clgr.txt

@@ -0,0 +1,12 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clgr %r0, %r0
+0xb9 0x21 0x00 0x00
+
+# CHECK: clgr %r0, %r15
+0xb9 0x21 0x00 0x0f
+
+# CHECK: clgr %r15, %r0
+0xb9 0x21 0x00 0xf0
+
+# CHECK: clgr %r7, %r8
+0xb9 0x21 0x00 0x78

llvm/test/MC/Disassembler/SystemZ/insn-clgrl.txt

@@ -0,0 +1,24 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clgrl %r0, 0x0
+0xc6 0x0a 0x00 0x00 0x00 0x00
+
+# CHECK: clgrl %r15, 0x6
+0xc6 0xfa 0x00 0x00 0x00 0x00
+
+# CHECK: clgrl %r0, 0xa
+0xc6 0x0a 0xff 0xff 0xff 0xff
+
+# CHECK: clgrl %r15, 0x10
+0xc6 0xfa 0xff 0xff 0xff 0xff
+
+# CHECK: clgrl %r0, 0xffffffff00000018
+0xc6 0x0a 0x80 0x00 0x00 0x00
+
+# CHECK: clgrl %r15, 0xffffffff0000001e
+0xc6 0xfa 0x80 0x00 0x00 0x00
+
+# CHECK: clgrl %r0, 0x100000022
+0xc6 0x0a 0x7f 0xff 0xff 0xff
+
+# CHECK: clgrl %r15, 0x100000028
+0xc6 0xfa 0x7f 0xff 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-clhhsi.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clhhsi 0, 0
+0xe5 0x55 0x00 0x00 0x00 0x00
+
+# CHECK: clhhsi 4095, 0
+0xe5 0x55 0x0f 0xff 0x00 0x00
+
+# CHECK: clhhsi 0, 65535
+0xe5 0x55 0x00 0x00 0xff 0xff
+
+# CHECK: clhhsi 0(%r1), 42
+0xe5 0x55 0x10 0x00 0x00 0x2a
+
+# CHECK: clhhsi 0(%r15), 42
+0xe5 0x55 0xf0 0x00 0x00 0x2a
+
+# CHECK: clhhsi 4095(%r1), 42
+0xe5 0x55 0x1f 0xff 0x00 0x2a
+
+# CHECK: clhhsi 4095(%r15), 42
+0xe5 0x55 0xff 0xff 0x00 0x2a

llvm/test/MC/Disassembler/SystemZ/insn-clhrl.txt

@@ -0,0 +1,24 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: clhrl %r0, 0xaabbccdc
+0xc6 0x07 0x55 0x5d 0xe6 0x6e
+
+# CHECK: clhrl %r15, 0xaabbcce2
+0xc6 0xf7 0x55 0x5d 0xe6 0x6e
+
+# CHECK: clhrl %r0, 0xc
+0xc6 0x07 0x00 0x00 0x00 0x00
+
+# CHECK: clhrl %r15, 0x12
+0xc6 0xf7 0x00 0x00 0x00 0x00
+
+# CHECK: clhrl %r3, 0x18
+0xc6 0x37 0x00 0x00 0x00 0x00
+
+# CHECK: clhrl %r4, 0x1e
+0xc6 0x47 0x00 0x00 0x00 0x00
+
+# CHECK: clhrl %r7, 0x24
+0xc6 0x77 0x00 0x00 0x00 0x00
+
+# CHECK: clhrl %r8, 0x2a
+0xc6 0x87 0x00 0x00 0x00 0x00

llvm/test/MC/Disassembler/SystemZ/insn-cli.txt

@@ -0,0 +1,21 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cli 0, 0
+0x95 0x00 0x00 0x00
+
+# CHECK: cli 4095, 0
+0x95 0x00 0x0f 0xff
+
+# CHECK: cli 0, 255
+0x95 0xff 0x00 0x00
+
+# CHECK: cli 0(%r1), 42
+0x95 0x2a 0x10 0x00
+
+# CHECK: cli 0(%r15), 42
+0x95 0x2a 0xf0 0x00
+
+# CHECK: cli 4095(%r1), 42
+0x95 0x2a 0x1f 0xff
+
+# CHECK: cli 4095(%r15), 42
+0x95 0x2a 0xff 0xff

llvm/test/MC/Disassembler/SystemZ/insn-cliy.txt

@@ -0,0 +1,30 @@
+# RUN: llvm-mc --disassemble %s -triple=s390x-linux-gnu | FileCheck %s
+# CHECK: cliy -524288, 0
+0xeb 0x00 0x00 0x00 0x80 0x55
+
+# CHECK: cliy -1, 0
+0xeb 0x00 0x0f 0xff 0xff 0x55
+
+# CHECK: cliy 0, 0
+0xeb 0x00 0x00 0x00 0x00 0x55
+
+# CHECK: cliy 1, 0
+0xeb 0x00 0x00 0x01 0x00 0x55
+
+# CHECK: cliy 524287, 0
+0xeb 0x00 0x0f 0xff 0x7f 0x55
+
+# CHECK: cliy 0, 255
+0xeb 0xff 0x00 0x00 0x00 0x55
+
+# CHECK: cliy 0(%r1), 42
+0xeb 0x2a 0x10 0x00 0x00 0x55
+
+# CHECK: cliy 0(%r15), 42
+0xeb 0x2a 0xf0 0x00 0x00 0x55
+
+# CHECK: cliy 524287(%r1), 42
+0xeb 0x2a 0x1f 0xff 0x7f 0x55
+
+# CHECK: cliy 524287(%r15), 42
+0xeb 0x2a 0xff 0xff 0x7f 0x55