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[Aarch64] Add v8.2-a half precision element extract intrinsics 

Summary:
Implements the intrinsics define on the ACLE to extract half precision fp scalar elements from float16x4_t and float16x8_t vector types.
a.k.a:
vduph_lane_f16
vduph_laneq_f16

Reviewers: pablooliveira, olista01, LukeGeeson, DavidSpickett

Reviewed By: DavidSpickett

Subscribers: DavidSpickett, javed.absar, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D60272

llvm-svn: 358276
This commit is contained in:
Diogo N. Sampaio 2019-04-12 10:43:48 +00:00
parent 69150467b0
commit eb312ddfdf
2 changed files with 21 additions and 0 deletions
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8
clang/lib/CodeGen/CGBuiltin.cpp
View File

@ -7847,6 +7847,14 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
: Intrinsic::aarch64_neon_sqsub;
return EmitNeonCall(CGM.getIntrinsic(AccInt, Int64Ty), Ops, "vqdmlXl");
}
case NEON::BI__builtin_neon_vduph_lane_f16: {
return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
"vget_lane");
}
case NEON::BI__builtin_neon_vduph_laneq_f16: {
return Builder.CreateExtractElement(Ops[0], EmitScalarExpr(E->getArg(1)),
"vgetq_lane");
}
}
llvm::VectorType *VTy = GetNeonType(this, Type);

13
clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics.c
View File

@ -1618,3 +1618,16 @@ float16x8_t test_vtrn2q_f16(float16x8_t a, float16x8_t b) {
return vtrn2q_f16(a, b);
}
// CHECK-LABEL: @test_vduph_laneq_f16(
// CHECK: [[V:%.*]] = extractelement <8 x half> [[V2:%.*]], i32 7
// CHECK-NEXT: ret half [[V]]
float16_t test_vduph_laneq_f16(float16x8_t vec) {
return vduph_laneq_f16(vec, 7);
}
// CHECK-LABEL: @test_vduph_lane_f16(
// CHECK: [[V:%.*]] = extractelement <4 x half> [[V2:%.*]], i32 3
// CHECK-NEXT: ret half [[V]]
float16_t test_vduph_lane_f16(float16x4_t vec) {
return vduph_lane_f16(vec, 3);
}