[AVX-512] Remove masked 128/256-bit pshufb builtins. Replace with a select and the older unmaksed builtins.

llvm-svn: 284925
This commit is contained in:
Craig Topper 2016-10-22 21:24:42 +00:00
parent 78a9c40326
commit eb1c0afa90
3 changed files with 24 additions and 28 deletions

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@ -1156,8 +1156,6 @@ TARGET_BUILTIN(__builtin_ia32_pminub128_mask, "V16cV16cV16cV16cUs", "", "avx512v
TARGET_BUILTIN(__builtin_ia32_pminub256_mask, "V32cV32cV32cV32cUi", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pminuw128_mask, "V8sV8sV8sV8sUc", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pminuw256_mask, "V16sV16sV16sV16sUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pshufb128_mask, "V16cV16cV16cV16cUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_pshufb256_mask, "V32cV32cV32cV32cUi", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_psubsb128_mask, "V16cV16cV16cV16cUs", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_psubsb256_mask, "V32cV32cV32cV32cUi", "", "avx512vl,avx512bw")
TARGET_BUILTIN(__builtin_ia32_psubsw128_mask, "V8sV8sV8sV8sUc", "", "avx512vl,avx512bw")

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@ -1531,41 +1531,35 @@ _mm256_mask_min_epu16 (__m256i __W, __mmask16 __M, __m256i __A,
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mask_shuffle_epi8 (__m128i __W, __mmask16 __U, __m128i __A,
__m128i __B)
_mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B)
{
return (__m128i) __builtin_ia32_pshufb128_mask ((__v16qi) __A,
(__v16qi) __B,
(__v16qi) __W,
(__mmask16) __U);
return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
(__v16qi)_mm_shuffle_epi8(__A, __B),
(__v16qi)__W);
}
static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B)
{
return (__m128i) __builtin_ia32_pshufb128_mask ((__v16qi) __A,
(__v16qi) __B,
(__v16qi) _mm_setzero_si128 (),
(__mmask16) __U);
return (__m128i)__builtin_ia32_selectb_128((__mmask16)__U,
(__v16qi)_mm_shuffle_epi8(__A, __B),
(__v16qi)_mm_setzero_si128());
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_mask_shuffle_epi8 (__m256i __W, __mmask32 __U, __m256i __A,
__m256i __B)
_mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B)
{
return (__m256i) __builtin_ia32_pshufb256_mask ((__v32qi) __A,
(__v32qi) __B,
(__v32qi) __W,
(__mmask32) __U);
return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
(__v32qi)_mm256_shuffle_epi8(__A, __B),
(__v32qi)__W);
}
static __inline__ __m256i __DEFAULT_FN_ATTRS
_mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B)
{
return (__m256i) __builtin_ia32_pshufb256_mask ((__v32qi) __A,
(__v32qi) __B,
(__v32qi) _mm256_setzero_si256 (),
(__mmask32) __U);
return (__m256i)__builtin_ia32_selectb_256((__mmask32)__U,
(__v32qi)_mm256_shuffle_epi8(__A, __B),
(__v32qi)_mm256_setzero_si256());
}
static __inline__ __m128i __DEFAULT_FN_ATTRS

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@ -1323,22 +1323,26 @@ __m256i test_mm256_mask_min_epu16(__m256i __W, __mmask16 __M, __m256i __A,
}
__m128i test_mm_mask_shuffle_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_mask_shuffle_epi8
// CHECK: @llvm.x86.avx512.mask.pshuf.b.128
// CHECK: @llvm.x86.ssse3.pshuf.b
// CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
return _mm_mask_shuffle_epi8(__W,__U,__A,__B);
}
__m128i test_mm_maskz_shuffle_epi8(__mmask16 __U, __m128i __A, __m128i __B) {
// CHECK-LABEL: @test_mm_maskz_shuffle_epi8
// CHECK: @llvm.x86.avx512.mask.pshuf.b.128
// CHECK: @llvm.x86.ssse3.pshuf.b
// CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
return _mm_maskz_shuffle_epi8(__U,__A,__B);
}
__m256i test_mm256_mask_shuffle_epi8(__m256i __W, __mmask32 __U, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_mask_shuffle_epi8
// CHECK: @llvm.x86.avx512.mask.pshuf.b.256
// CHECK: @llvm.x86.avx2.pshuf.b
// CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
return _mm256_mask_shuffle_epi8(__W,__U,__A,__B);
}
__m256i test_mm256_maskz_shuffle_epi8(__mmask32 __U, __m256i __A, __m256i __B) {
// CHECK-LABEL: @test_mm256_maskz_shuffle_epi8
// CHECK: @llvm.x86.avx512.mask.pshuf.b.256
// CHECK: @llvm.x86.avx2.pshuf.b
// CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
return _mm256_maskz_shuffle_epi8(__U,__A,__B);
}
__m128i test_mm_mask_subs_epi8(__m128i __W, __mmask16 __U, __m128i __A, __m128i __B) {