forked from OSchip/llvm-project
When optimizing with debug info, don't keep the
stoppoint nodes around until Legalize; doing this imposed an ordering on a sequence of loads that came from different lines, interfering with scheduling. llvm-svn: 67692
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@ -3895,10 +3895,11 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
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DbgStopPointInst &SPI = cast<DbgStopPointInst>(I);
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if (DW && DW->ValidDebugInfo(SPI.getContext())) {
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MachineFunction &MF = DAG.getMachineFunction();
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DAG.setRoot(DAG.getDbgStopPoint(getRoot(),
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SPI.getLine(),
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SPI.getColumn(),
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SPI.getContext()));
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if (Fast)
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DAG.setRoot(DAG.getDbgStopPoint(getRoot(),
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SPI.getLine(),
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SPI.getColumn(),
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SPI.getContext()));
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DICompileUnit CU(cast<GlobalVariable>(SPI.getContext()));
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std::string Dir, FN;
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unsigned SrcFile = DW->getOrCreateSourceID(CU.getDirectory(Dir),
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