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Reject invalid imod values in t2CPS instructions. 

llvm-svn: 138306
This commit is contained in:
Owen Anderson 2011-08-22 23:44:04 +00:00
parent 08b5c19a4d
commit eb1367b2b8
2 changed files with 11 additions and 1 deletions
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1
llvm/lib/Target/ARM/ARMInstrFormats.td
View File

@ -134,6 +134,7 @@ def VFPNeonA8Domain : Domain<5>; // Instructions in VFP & Neon under A8
// ARM imod and iflag operands, used only by the CPS instruction.
def imod_op : Operand<i32> {
let PrintMethod = "printCPSIMod";
let DecoderMethod = "DecodeCPSIMod";
}
def ProcIFlagsOperand : AsmOperandClass {

11
llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
View File

@ -179,7 +179,8 @@ static DecodeStatus DecodeVMOVSRR(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeCPSIMod(llvm::MCInst &Inst, unsigned Insn,
uint64_t Address, const void *Decoder);
static DecodeStatus DecodeThumbAddSpecialReg(llvm::MCInst &Inst, uint16_t Insn,
uint64_t Address, const void *Decoder);
@ -3240,3 +3241,11 @@ static DecodeStatus DecodeVMOVRRS(llvm::MCInst &Inst, unsigned Insn,
return S;
}
static DecodeStatus DecodeCPSIMod(llvm::MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
if (Val == 0x1) return Fail;
Inst.addOperand(MCOperand::CreateImm(Val));
return Success;
}