forked from OSchip/llvm-project
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45b3dcd35b
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eb0bf5af65
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@ -34,7 +34,7 @@ def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true",
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/// Cyclone has register move instructions which are "free".
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def FeatureZCRegMove : SubtargetFeature<"zcm", "HasZeroCycleRegMove", "true",
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"Has zereo-cycle register moves">;
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"Has zero-cycle register moves">;
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/// Cyclone has instructions which zero registers for "free".
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def FeatureZCZeroing : SubtargetFeature<"zcz", "HasZeroCycleZeroing", "true",
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