forked from OSchip/llvm-project
AArch64/GlobalISel: Fix verifier error after selecting returnaddress
This was caching the wrong register to re-use later.
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@ -4793,7 +4793,7 @@ bool AArch64InstructionSelector::selectIntrinsic(MachineInstr &I,
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AArch64::GPR64spRegClass);
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MIRBuilder.buildCopy(DstReg, LiveInLR);
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MFReturnAddr = DstReg;
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MFReturnAddr = LiveInLR;
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I.eraseFromParent();
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return true;
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}
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@ -4,6 +4,7 @@
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--- |
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define void @lr_other_block() { ret void }
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define void @already_live_in() { ret void }
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define void @multi_use() { ret void }
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declare i8* @llvm.returnaddress(i32 immarg)
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...
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---
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@ -61,3 +62,33 @@ body: |
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$x0 = COPY %4
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RET_ReallyLR implicit $x0
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...
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# Check copies are inserted in the right places when selecting
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# multiple uses in different blocks
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---
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name: multi_use
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: multi_use
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x80000000)
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; CHECK: liveins: $w0, $x0, $lr
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; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $lr
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; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY [[COPY]]
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; CHECK: B %bb.1
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; CHECK: bb.1:
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; CHECK: $x0 = COPY [[COPY1]]
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; CHECK: [[COPY2:%[0-9]+]]:gpr64 = COPY [[COPY]]
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; CHECK: RET_ReallyLR implicit [[COPY2]]
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bb.0:
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liveins: $w0, $x0, $lr
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%0:gpr(p0) = G_INTRINSIC intrinsic(@llvm.returnaddress), 0
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G_BR %bb.1
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bb.1:
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$x0 = COPY %0
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%1:gpr(p0) = G_INTRINSIC intrinsic(@llvm.returnaddress), 0
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RET_ReallyLR implicit %1
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...
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