forked from OSchip/llvm-project
[X86] Promote several single precision FP libcalls on Windows
A number of libcalls don't exist in any particular lib but are, instead, defined in math.h as inline functions (even in C mode!). Don't rely on their existence when lowering @llvm.{cos,sin,floor,..}.f32, promote them instead. N.B. We had logic to handle FREM but were missing out on a number of others. This change generalizes the FREM handling. llvm-svn: 268875
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@ -205,6 +205,8 @@ static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T,
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TLI.setUnavailable(LibFunc::fmaxf);
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TLI.setUnavailable(LibFunc::fmodf);
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TLI.setUnavailable(LibFunc::logf);
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TLI.setUnavailable(LibFunc::log10f);
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TLI.setUnavailable(LibFunc::modff);
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TLI.setUnavailable(LibFunc::powf);
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TLI.setUnavailable(LibFunc::sinf);
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TLI.setUnavailable(LibFunc::sinhf);
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@ -308,16 +308,7 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
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setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand);
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if (Subtarget.is32Bit() && Subtarget.isTargetKnownWindowsMSVC()) {
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// On 32 bit MSVC, `fmodf(f32)` is not defined - only `fmod(f64)`
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// is. We should promote the value to 64-bits to solve this.
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// This is what the CRT headers do - `fmodf` is an inline header
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// function casting to f64 and calling `fmod`.
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setOperationAction(ISD::FREM , MVT::f32 , Promote);
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} else {
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setOperationAction(ISD::FREM , MVT::f32 , Expand);
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}
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setOperationAction(ISD::FREM , MVT::f32 , Expand);
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setOperationAction(ISD::FREM , MVT::f64 , Expand);
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setOperationAction(ISD::FREM , MVT::f80 , Expand);
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setOperationAction(ISD::FLT_ROUNDS_ , MVT::i32 , Custom);
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@ -1585,6 +1576,17 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationAction(ISD::UDIVREM, MVT::i128, Custom);
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}
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// On 32 bit MSVC, `fmodf(f32)` is not defined - only `fmod(f64)`
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// is. We should promote the value to 64-bits to solve this.
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// This is what the CRT headers do - `fmodf` is an inline header
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// function casting to f64 and calling `fmod`.
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if (Subtarget.is32Bit() && Subtarget.isTargetKnownWindowsMSVC())
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for (ISD::NodeType Op :
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{ISD::FCEIL, ISD::FCOS, ISD::FEXP, ISD::FFLOOR, ISD::FREM, ISD::FLOG,
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ISD::FLOG10, ISD::FPOW, ISD::FSIN})
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if (isOperationExpand(Op, MVT::f32))
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setOperationAction(Op, MVT::f32, Promote);
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// We have target-specific dag combine patterns for the following nodes:
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setTargetDAGCombine(ISD::VECTOR_SHUFFLE);
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setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT);
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