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[AMDGPU] Don't assert on partial exec copy 

After Machine CSE and coalescing we can end up with copies of exec to
subregister SGPRs.

Differential Revision: https://reviews.llvm.org/D77992
This commit is contained in:
Austin Kerbow 2020-04-12 18:44:45 -07:00
parent aa081721d4
commit eab9a4f119
2 changed files with 23 additions and 3 deletions
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4
llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
View File

@ -71,10 +71,8 @@ FunctionPass *llvm::createSIOptimizeExecMaskingPreRAPass() {
static bool isFullExecCopy(const MachineInstr& MI, const GCNSubtarget& ST) {
unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
if (MI.isCopy() && MI.getOperand(1).getReg() == Exec) {
assert(MI.isFullCopy());
if (MI.isFullCopy() && MI.getOperand(1).getReg() == Exec)
return true;
}
return false;
}

22
llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
View File

@ -117,3 +117,25 @@ body: |
bb.1:
...
# Don't crash on exec copy to SGPR subregister.
---
name: exec_copy_to_subreg
tracksRegLiveness: true
body: |
; GCN-LABEL: name: exec_copy_to_subreg
; GCN: bb.0:
; GCN: successors: %bb.1(0x80000000)
; GCN: dead undef %0.sub0:sreg_256 = COPY $exec
; GCN: dead %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, undef %2:sreg_64_xexec, implicit $exec
; GCN: S_BRANCH %bb.1
; GCN: bb.1:
bb.0:
undef %0.sub0:sreg_256 = COPY $exec
%2:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, undef %1:sreg_64_xexec, implicit $exec
S_BRANCH %bb.1
bb.1:
...