forked from OSchip/llvm-project
[ELF] .ARM.exidx sentinel section should use InputSectionDescriptions.
This change converts the writing of the .ARM.exidx sentinel section to use the InputSectionDescriptions instead of OutputSection::Sections this is in preparation for the retirement of OutputSection::Sections. Differential Revision: https://reviews.llvm.org/D33500 llvm-svn: 304289
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@ -2186,13 +2186,23 @@ ARMExidxSentinelSection::ARMExidxSentinelSection()
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// This section will have been sorted last in the .ARM.exidx table.
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// This table entry will have the form:
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// | PREL31 upper bound of code that has exception tables | EXIDX_CANTUNWIND |
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// The sentinel must have the PREL31 value of an address higher than any
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// address described by any other table entry.
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void ARMExidxSentinelSection::writeTo(uint8_t *Buf) {
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// Get the InputSection before us, we are by definition last
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auto RI = this->OutSec->Sections.rbegin();
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InputSection *LE = *(++RI);
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InputSection *LC = cast<InputSection>(LE->getLinkOrderDep());
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uint64_t S = LC->OutSec->Addr + LC->getOffset(LC->getSize());
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uint64_t P = this->getVA();
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// The Sections are sorted in order of ascending PREL31 address with the
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// sentinel last. We need to find the InputSection that precedes the
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// sentinel. By construction the Sentinel is in the last
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// InputSectionDescription as the InputSection that precedes it.
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OutputSectionCommand *C = Script->getCmd(OutSec);
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auto ISD = std::find_if(C->Commands.rbegin(), C->Commands.rend(),
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[](const BaseCommand *Base) {
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return isa<InputSectionDescription>(Base);
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});
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auto L = cast<InputSectionDescription>(*ISD);
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InputSection *Highest = L->Sections[L->Sections.size() - 2];
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InputSection *LS = cast<InputSection>(Highest->getLinkOrderDep());
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uint64_t S = LS->OutSec->Addr + LS->getOffset(LS->getSize());
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uint64_t P = getVA();
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Target->relocateOne(Buf, R_ARM_PREL31, S - P);
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write32le(Buf + 4, 0x1);
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}
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