forked from OSchip/llvm-project
[VectorCombine] Add tests which require DT to use info from assumes.
This commit is contained in:
Florian Hahn
parent
9e4d72675f
commit
ea27dd7497
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@ -58,6 +58,98 @@ entry:
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ret void
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}
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declare i1 @cond()
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define void @load_extract_insert_store_var_idx_assume_valid_in_dominating_block(i64 %idx.1, i64 %idx.2, <225 x double>* %A, i1 %c.1) {
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; CHECK-LABEL: @load_extract_insert_store_var_idx_assume_valid_in_dominating_block(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i64 [[IDX_1:%.*]], 225
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_1]])
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i64 [[IDX_2:%.*]], 225
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_2]])
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; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[LV:%.*]] = load <225 x double>, <225 x double>* [[A:%.*]], align 8
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; CHECK-NEXT: [[EXT_0:%.*]] = extractelement <225 x double> [[LV]], i64 [[IDX_1]]
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; CHECK-NEXT: [[MUL:%.*]] = fmul double 2.000000e+01, [[EXT_0]]
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; CHECK-NEXT: [[EXT_1:%.*]] = extractelement <225 x double> [[LV]], i64 [[IDX_2]]
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; CHECK-NEXT: [[SUB:%.*]] = fsub double [[EXT_1]], [[MUL]]
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; CHECK-NEXT: [[INS:%.*]] = insertelement <225 x double> [[LV]], double [[SUB]], i64 [[IDX_1]]
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; CHECK-NEXT: store <225 x double> [[INS]], <225 x double>* [[A]], align 8
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; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()
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; CHECK-NEXT: br i1 [[C_2]], label [[LOOP]], label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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%cmp.1 = icmp ult i64 %idx.1, 225
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call void @llvm.assume(i1 %cmp.1)
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%cmp.2 = icmp ult i64 %idx.2, 225
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call void @llvm.assume(i1 %cmp.2)
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br i1 %c.1, label %loop, label %exit
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loop:
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%lv = load <225 x double>, <225 x double>* %A, align 8
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%ext.0 = extractelement <225 x double> %lv, i64 %idx.1
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%mul = fmul double 20.0, %ext.0
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%ext.1 = extractelement <225 x double> %lv, i64 %idx.2
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%sub = fsub double %ext.1, %mul
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%ins = insertelement <225 x double> %lv, double %sub, i64 %idx.1
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store <225 x double> %ins, <225 x double>* %A, align 8
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%c.2 = call i1 @cond()
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br i1 %c.2, label %loop, label %exit
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exit:
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ret void
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}
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define void @load_extract_insert_store_var_idx_assume_valid_in_non_dominating_block(i64 %idx.1, i64 %idx.2, <225 x double>* %A, i1 %c.1, i1 %c.2) {
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; CHECK-LABEL: @load_extract_insert_store_var_idx_assume_valid_in_non_dominating_block(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C_1:%.*]], label [[ASSUME_BLOCK:%.*]], label [[LOOP:%.*]]
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; CHECK: assume_block:
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; CHECK-NEXT: [[CMP_1:%.*]] = icmp ult i64 [[IDX_1:%.*]], 225
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_1]])
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; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i64 [[IDX_2:%.*]], 225
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP_2]])
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; CHECK-NEXT: br i1 [[C_2:%.*]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[LV:%.*]] = load <225 x double>, <225 x double>* [[A:%.*]], align 8
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; CHECK-NEXT: [[EXT_0:%.*]] = extractelement <225 x double> [[LV]], i64 [[IDX_1]]
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; CHECK-NEXT: [[MUL:%.*]] = fmul double 2.000000e+01, [[EXT_0]]
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; CHECK-NEXT: [[EXT_1:%.*]] = extractelement <225 x double> [[LV]], i64 [[IDX_2]]
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; CHECK-NEXT: [[SUB:%.*]] = fsub double [[EXT_1]], [[MUL]]
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; CHECK-NEXT: [[INS:%.*]] = insertelement <225 x double> [[LV]], double [[SUB]], i64 [[IDX_1]]
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; CHECK-NEXT: store <225 x double> [[INS]], <225 x double>* [[A]], align 8
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; CHECK-NEXT: [[C_3:%.*]] = call i1 @cond()
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; CHECK-NEXT: br i1 [[C_3]], label [[LOOP]], label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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entry:
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br i1 %c.1, label %assume_block, label %loop
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assume_block:
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%cmp.1 = icmp ult i64 %idx.1, 225
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call void @llvm.assume(i1 %cmp.1)
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%cmp.2 = icmp ult i64 %idx.2, 225
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call void @llvm.assume(i1 %cmp.2)
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br i1 %c.2, label %loop, label %exit
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loop:
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%lv = load <225 x double>, <225 x double>* %A, align 8
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%ext.0 = extractelement <225 x double> %lv, i64 %idx.1
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%mul = fmul double 20.0, %ext.0
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%ext.1 = extractelement <225 x double> %lv, i64 %idx.2
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%sub = fsub double %ext.1, %mul
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%ins = insertelement <225 x double> %lv, double %sub, i64 %idx.1
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store <225 x double> %ins, <225 x double>* %A, align 8
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%c.3 = call i1 @cond()
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br i1 %c.3, label %loop, label %exit
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exit:
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ret void
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}
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define void @load_extract_insert_store_var_idx_no_assume_valid(i64 %idx.1, i64 %idx.2, <225 x double>* %A) {
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; CHECK-LABEL: @load_extract_insert_store_var_idx_no_assume_valid(
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@ -105,6 +105,79 @@ entry:
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ret i32 %r
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}
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declare i1 @cond()
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define i32 @load_extract_idx_var_i64_known_valid_by_assume_in_dominating_block(<4 x i32>* %x, i64 %idx, i1 %c.1) {
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; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_assume_in_dominating_block(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IDX:%.*]], 4
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: br i1 [[C_1:%.*]], label [[LOOP:%.*]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, <4 x i32>* [[X:%.*]], align 16
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; CHECK-NEXT: call void @maythrow()
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; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i64 [[IDX]]
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; CHECK-NEXT: [[C_2:%.*]] = call i1 @cond()
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; CHECK-NEXT: br i1 [[C_2]], label [[LOOP]], label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[R]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: ret i32 [[P]]
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;
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entry:
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%cmp = icmp ult i64 %idx, 4
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call void @llvm.assume(i1 %cmp)
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br i1 %c.1, label %loop, label %exit
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loop:
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%lv = load <4 x i32>, <4 x i32>* %x
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call void @maythrow()
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%r = extractelement <4 x i32> %lv, i64 %idx
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%c.2 = call i1 @cond()
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br i1 %c.2, label %loop, label %exit
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exit:
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%p = phi i32 [ %r, %loop ], [ 0, %entry ]
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ret i32 %p
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}
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define i32 @load_extract_idx_var_i64_known_valid_by_assume_in_non_dominating_block(<4 x i32>* %x, i64 %idx, i1 %c.1, i1 %c.2) {
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; CHECK-LABEL: @load_extract_idx_var_i64_known_valid_by_assume_in_non_dominating_block(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br i1 [[C_1:%.*]], label [[ASSUME_CHECK:%.*]], label [[LOOP:%.*]]
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; CHECK: assume_check:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IDX:%.*]], 4
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; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
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; CHECK-NEXT: br i1 [[C_2:%.*]], label [[LOOP]], label [[EXIT:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[LV:%.*]] = load <4 x i32>, <4 x i32>* [[X:%.*]], align 16
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; CHECK-NEXT: call void @maythrow()
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; CHECK-NEXT: [[R:%.*]] = extractelement <4 x i32> [[LV]], i64 [[IDX]]
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; CHECK-NEXT: [[C_3:%.*]] = call i1 @cond()
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; CHECK-NEXT: br i1 [[C_3]], label [[LOOP]], label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: [[P:%.*]] = phi i32 [ [[R]], [[LOOP]] ], [ 0, [[ASSUME_CHECK]] ]
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; CHECK-NEXT: ret i32 0
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;
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entry:
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br i1 %c.1, label %assume_check, label %loop
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assume_check:
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%cmp = icmp ult i64 %idx, 4
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call void @llvm.assume(i1 %cmp)
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br i1 %c.2, label %loop, label %exit
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loop:
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%lv = load <4 x i32>, <4 x i32>* %x
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call void @maythrow()
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%r = extractelement <4 x i32> %lv, i64 %idx
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%c.3 = call i1 @cond()
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br i1 %c.3, label %loop, label %exit
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exit:
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%p = phi i32 [ %r, %loop ], [ 0, %assume_check ]
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ret i32 0
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}
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define i32 @load_extract_idx_var_i64_not_known_valid_by_assume_after_load(<4 x i32>* %x, i64 %idx) {
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; CHECK-LABEL: @load_extract_idx_var_i64_not_known_valid_by_assume_after_load(
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; CHECK-NEXT: entry:
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@ -604,3 +677,4 @@ define i32 @load_multiple_extracts_with_variable_indices_large_vector_all_valid_
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%res = add i32 %e.0, %e.1
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ret i32 %res
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}
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