From e9adcbde31454d3fe6db1d6e18f6e323ee80c759 Mon Sep 17 00:00:00 2001 From: David Green Date: Wed, 29 Sep 2021 16:55:31 +0100 Subject: [PATCH] [AArch64] Model Cortex-A55 Q register NEON instructions Cortex-A55 has 2 64bit NEON vector units, meaning a 128bit instruction requires taking both units (and can only be issued as the first instruction in a dual issue pair). This patch models that by splitting the WriteV SchedWrite into two - the WriteVd that reads/writes only 64bit operands, and the WriteVq that read/writes 128bit registers. The A55 schedule then uses this distinction to model the WriteVq as taking both resource units, and starting a Schedule Group and WriteVd as taking one as before. I believe this is more correct, even if it does not lead to much better performance. Differential Revision: https://reviews.llvm.org/D108766 --- .../lib/Target/AArch64/AArch64InstrFormats.td | 86 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 4 +- llvm/lib/Target/AArch64/AArch64SchedA53.td | 3 +- llvm/lib/Target/AArch64/AArch64SchedA55.td | 6 +- llvm/lib/Target/AArch64/AArch64SchedA57.td | 3 +- llvm/lib/Target/AArch64/AArch64SchedA64FX.td | 6 +- .../lib/Target/AArch64/AArch64SchedCyclone.td | 65 +- .../Target/AArch64/AArch64SchedExynosM3.td | 3 +- .../Target/AArch64/AArch64SchedExynosM4.td | 3 +- .../Target/AArch64/AArch64SchedExynosM5.td | 3 +- llvm/lib/Target/AArch64/AArch64SchedFalkor.td | 3 +- llvm/lib/Target/AArch64/AArch64SchedKryo.td | 3 +- llvm/lib/Target/AArch64/AArch64SchedTSV110.td | 3 +- .../Target/AArch64/AArch64SchedThunderX.td | 3 +- .../AArch64/AArch64SchedThunderX2T99.td | 7 +- .../AArch64/AArch64SchedThunderX3T110.td | 7 +- llvm/lib/Target/AArch64/AArch64Schedule.td | 11 +- .../AArch64/Cortex/A55-neon-instructions.s | 1858 ++++++++--------- 18 files changed, 1053 insertions(+), 1024 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td index ed489be8d69a..939880de0314 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td +++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td @@ -5310,7 +5310,7 @@ class BaseSIMDThreeSameVector size, bits<5> opcode, : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm), asm, "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind # "|" # kind # "\t$Rd, $Rn, $Rm|}", "", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -5333,7 +5333,7 @@ class BaseSIMDThreeSameVectorTied size, bits<5> opcode, : I<(outs regtype:$dst), (ins regtype:$Rd, regtype:$Rn, regtype:$Rm), asm, "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind # "|" # kind # "\t$Rd, $Rn, $Rm}", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -5352,7 +5352,7 @@ class BaseSIMDThreeSameVectorTied size, bits<5> opcode, let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in class BaseSIMDThreeSameVectorPseudo pattern> : Pseudo<(outs regtype:$dst), (ins regtype:$Rd, regtype:$Rn, regtype:$Rm), pattern>, - Sched<[WriteV]>; + Sched<[!if(!eq(regtype, V128), WriteVq, WriteVd)]>; multiclass SIMDLogicalThreeVectorPseudo { def v8i8 : BaseSIMDThreeSameVectorPseudo size, bits<5> opcode, : I<(outs regtype:$Rd), (ins regtype:$Rn), asm, "{\t$Rd" # dstkind # ", $Rn" # srckind # "|" # dstkind # "\t$Rd, $Rn}", "", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -5730,7 +5730,7 @@ class BaseSIMDTwoSameVectorTied size, bits<5> opcode, : I<(outs regtype:$dst), (ins regtype:$Rd, regtype:$Rn), asm, "{\t$Rd" # dstkind # ", $Rn" # srckind # "|" # dstkind # "\t$Rd, $Rn}", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -5776,7 +5776,7 @@ class BaseSIMDVectorLShiftLongBySize size, : I<(outs V128:$Rd), (ins regtype:$Rn), asm, "{\t$Rd" # dstkind # ", $Rn" # srckind # ", #" # amount # "|" # dstkind # "\t$Rd, $Rn, #" # amount # "}", "", []>, - Sched<[WriteV]> { + Sched<[WriteVq]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -6041,7 +6041,7 @@ class BaseSIMDMixedTwoVector size, bits<5> opcode, : I<(outs outreg:$Rd), (ins inreg:$Rn), asm, "{\t$Rd" # outkind # ", $Rn" # inkind # "|" # outkind # "\t$Rd, $Rn}", "", pattern>, - Sched<[WriteV]> { + Sched<[WriteVq]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -6064,7 +6064,7 @@ class BaseSIMDMixedTwoVectorTied size, bits<5> opcode, : I<(outs outreg:$dst), (ins outreg:$Rd, inreg:$Rn), asm, "{\t$Rd" # outkind # ", $Rn" # inkind # "|" # outkind # "\t$Rd, $Rn}", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[WriteVq]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -6116,7 +6116,7 @@ class BaseSIMDCmpTwoVector size, bits<2> size2, "{\t$Rd" # kind # ", $Rn" # kind # ", #" # zero # "|" # kind # "\t$Rd, $Rn, #" # zero # "}", "", [(set (dty regtype:$Rd), (OpNode (sty regtype:$Rn)))]>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -6214,7 +6214,7 @@ class BaseSIMDFPCvtTwoVector size, bits<5> opcode, list pattern> : I<(outs outtype:$Rd), (ins intype:$Rn), asm, !strconcat("\t$Rd", VdTy, ", $Rn", VnTy), "", pattern>, - Sched<[WriteV]> { + Sched<[WriteVq]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -6236,7 +6236,7 @@ class BaseSIMDFPCvtTwoVectorTied size, bits<5> opcode, list pattern> : I<(outs outtype:$dst), (ins outtype:$Rd, intype:$Rn), asm, !strconcat("\t$Rd", VdTy, ", $Rn", VnTy), "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[WriteVq]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -6299,7 +6299,7 @@ class BaseSIMDDifferentThreeVector size, bits<4> opcode, : I<(outs outtype:$Rd), (ins intype1:$Rn, intype2:$Rm), asm, "{\t$Rd" # outkind # ", $Rn" # inkind1 # ", $Rm" # inkind2 # "|" # outkind # "\t$Rd, $Rn, $Rm}", "", pattern>, - Sched<[WriteV]> { + Sched<[WriteVq]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -6325,7 +6325,7 @@ class BaseSIMDDifferentThreeVectorTied size, bits<4> opcode, : I<(outs outtype:$dst), (ins outtype:$Rd, intype1:$Rn, intype2:$Rm), asm, "{\t$Rd" # outkind # ", $Rn" # inkind1 # ", $Rm" # inkind2 # "|" # outkind # "\t$Rd, $Rn, $Rm}", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[WriteVq]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -6665,7 +6665,7 @@ class BaseSIMDBitwiseExtract, - Sched<[WriteV]> { + Sched<[!if(size, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -6699,7 +6699,7 @@ class BaseSIMDZipVector size, bits<3> opc, RegisterOperand regtype, "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind # "|" # kind # "\t$Rd, $Rn, $Rm}", "", [(set (valty regtype:$Rd), (OpNode regtype:$Rn, regtype:$Rm))]>, - Sched<[WriteV]> { + Sched<[!if(!eq(regtype, V128), WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -6755,7 +6755,7 @@ class BaseSIMDThreeScalar size, bits<5> opcode, list pattern> : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm), asm, "\t$Rd, $Rn, $Rm", "", pattern>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -6775,7 +6775,7 @@ class BaseSIMDThreeScalarTied size, bit R, bits<5> opcode, dag oops, dag iops, string asm, list pattern> : I, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -6868,7 +6868,7 @@ class BaseSIMDThreeScalarMixed size, bits<5> opcode, dag oops, dag iops, string asm, string cstr, list pat> : I, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -6921,7 +6921,7 @@ class BaseSIMDTwoScalar size, bits<2> size2, bits<5> opcode, string asm, list pat> : I<(outs regtype:$Rd), (ins regtype2:$Rn), asm, "\t$Rd, $Rn", "", pat>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; let Inst{31-30} = 0b01; @@ -6943,7 +6943,7 @@ class BaseSIMDTwoScalarTied size, bits<5> opcode, string asm, list pat> : I<(outs regtype:$dst), (ins regtype:$Rd, regtype2:$Rn), asm, "\t$Rd, $Rn", "$Rd = $dst", pat>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; let Inst{31-30} = 0b01; @@ -6963,7 +6963,7 @@ class BaseSIMDCmpTwoScalar size, bits<2> size2, bits<5> opcode, RegisterClass regtype, string asm, string zero> : I<(outs regtype:$Rd), (ins regtype:$Rn), asm, "\t$Rd, $Rn, #" # zero, "", []>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; let Inst{31-30} = 0b01; @@ -6982,7 +6982,7 @@ class BaseSIMDCmpTwoScalar size, bits<2> size2, bits<5> opcode, class SIMDInexactCvtTwoScalar opcode, string asm> : I<(outs FPR32:$Rd), (ins FPR64:$Rn), asm, "\t$Rd, $Rn", "", [(set (f32 FPR32:$Rd), (int_aarch64_sisd_fcvtxn (f64 FPR64:$Rn)))]>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; let Inst{31-17} = 0b011111100110000; @@ -7104,7 +7104,7 @@ class BaseSIMDPairwiseScalar size, bits<5> opcode, string asm, string kind> : I<(outs regtype:$Rd), (ins vectype:$Rn), asm, "{\t$Rd, $Rn" # kind # "|" # kind # "\t$Rd, $Rn}", "", []>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; let Inst{31-30} = 0b01; @@ -7144,7 +7144,7 @@ class BaseSIMDAcrossLanes size, bits<5> opcode, string asm, string kind, list pattern> : I<(outs regtype:$Rd), (ins vectype:$Rn), asm, "{\t$Rd, $Rn" # kind # "|" # kind # "\t$Rd, $Rn}", "", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -7210,7 +7210,7 @@ multiclass SIMDFPAcrossLanes opcode, bit sz1, string asm, class BaseSIMDInsDup pattern> : I, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -7522,7 +7522,7 @@ class BaseSIMDTableLookup len, bit op, RegisterOperand vectype, RegisterOperand listtype, string asm, string kind> : I<(outs vectype:$Vd), (ins listtype:$Vn, vectype:$Vm), asm, "\t$Vd" # kind # ", $Vn, $Vm" # kind, "", []>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Vd; bits<5> Vn; bits<5> Vm; @@ -7543,7 +7543,7 @@ class BaseSIMDTableLookupTied len, bit op, RegisterOperand vectyp RegisterOperand listtype, string asm, string kind> : I<(outs vectype:$dst), (ins vectype:$Vd, listtype:$Vn, vectype:$Vm), asm, "\t$Vd" # kind # ", $Vn, $Vm" # kind, "$Vd = $dst", []>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Vd; bits<5> Vn; bits<5> Vm; @@ -7662,7 +7662,7 @@ class BaseSIMDScalarCPY, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> dst; bits<5> src; let Inst{31-21} = 0b01011110000; @@ -7727,7 +7727,7 @@ class BaseSIMDModifiedImm pattern> : I, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<8> imm8; let Inst{31} = 0; @@ -7897,7 +7897,7 @@ class BaseSIMDIndexed size, bits<4> opc, asm, "{\t$Rd" # dst_kind # ", $Rn" # lhs_kind # ", $Rm" # rhs_kind # "$idx" # "|" # apple_kind # "\t$Rd, $Rn, $Rm$idx}", "", pattern>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -7927,7 +7927,7 @@ class BaseSIMDIndexedTied size, bits<4> opc, (ins dst_reg:$Rd, lhs_reg:$Rn, rhs_reg:$Rm, vec_idx:$idx), asm, "{\t$Rd" # dst_kind # ", $Rn" # lhs_kind # ", $Rm" # rhs_kind # "$idx" # "|" # apple_kind # "\t$Rd, $Rn, $Rm$idx}", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -8020,7 +8020,7 @@ class SIMDBF16MLALIndex (v8bf16 (AArch64duplane16 (v8bf16 V128_lo:$Rm), VectorIndexH:$idx)))))]>, - Sched<[WriteV]> { + Sched<[WriteVq]> { bits<5> Rd; bits<5> Rn; bits<4> Rm; @@ -8941,7 +8941,7 @@ class BaseSIMDScalarShift opc, bits<7> fixed_imm, Operand immtype, string asm, list pattern> : I<(outs regtype1:$Rd), (ins regtype2:$Rn, immtype:$imm), asm, "\t$Rd, $Rn, $imm", "", pattern>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; bits<7> imm; @@ -8961,7 +8961,7 @@ class BaseSIMDScalarShiftTied opc, bits<7> fixed_imm, Operand immtype, string asm, list pattern> : I<(outs regtype1:$dst), (ins regtype1:$Rd, regtype2:$Rn, immtype:$imm), asm, "\t$Rd, $Rn, $imm", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[WriteVd]> { bits<5> Rd; bits<5> Rn; bits<7> imm; @@ -9125,7 +9125,7 @@ class BaseSIMDVectorShift opc, bits<7> fixed_imm, : I<(outs dst_reg:$Rd), (ins src_reg:$Rn, immtype:$imm), asm, "{\t$Rd" # dst_kind # ", $Rn" # src_kind # ", $imm" # "|" # dst_kind # "\t$Rd, $Rn, $imm}", "", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -9148,7 +9148,7 @@ class BaseSIMDVectorShiftTied opc, bits<7> fixed_imm, : I<(outs vectype1:$dst), (ins vectype1:$Rd, vectype2:$Rn, immtype:$imm), asm, "{\t$Rd" # dst_kind # ", $Rn" # src_kind # ", $imm" # "|" # dst_kind # "\t$Rd, $Rn, $imm}", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; let Inst{31} = 0; @@ -10695,7 +10695,7 @@ class BaseSIMDThreeSameVectorComplex size, bits<3> opcode, : I<(outs regtype:$Rd), (ins regtype:$Rn, regtype:$Rm, rottype:$rot), asm, "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind # ", $rot" "|" # kind # "\t$Rd, $Rn, $Rm, $rot}", "", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -10769,7 +10769,7 @@ class BaseSIMDThreeSameVectorTiedComplex size, (ins regtype:$Rd, regtype:$Rn, regtype:$Rm, rottype:$rot), asm, "{\t$Rd" # kind # ", $Rn" # kind # ", $Rm" # kind # ", $rot" "|" # kind # "\t$Rd, $Rn, $Rm, $rot}", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -10845,7 +10845,7 @@ class BaseSIMDIndexedTiedComplex size, "{\t$Rd" # dst_kind # ", $Rn" # lhs_kind # ", $Rm" # rhs_kind # "$idx, $rot" # "|" # apple_kind # "\t$Rd, $Rn, $Rm$idx, $rot}", "$Rd = $dst", pattern>, - Sched<[WriteV]> { + Sched<[!if(Q, WriteVq, WriteVd)]> { bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -10910,7 +10910,7 @@ let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in class AESBase opc, string asm, dag outs, dag ins, string cstr, list pat> : I, - Sched<[WriteV]>{ + Sched<[WriteVq]>{ bits<5> Rd; bits<5> Rn; let Inst{31-16} = 0b0100111000101000; @@ -10936,7 +10936,7 @@ class SHA3OpTiedInst opc, string asm, string dst_lhs_kind, : I, - Sched<[WriteV]>{ + Sched<[WriteVq]>{ bits<5> Rd; bits<5> Rn; bits<5> Rm; @@ -10976,7 +10976,7 @@ class SHA2OpInst opc, string asm, string kind, list pat> : I, - Sched<[WriteV]>{ + Sched<[WriteVq]>{ bits<5> Rd; bits<5> Rn; let Inst{31-16} = 0b0101111000101000; @@ -10999,7 +10999,7 @@ class SHAInstSS opc, string asm, Intrinsic OpNode> // Armv8.2-A Crypto extensions class BaseCryptoV82 pattern> - : I , Sched<[WriteV]> { + : I , Sched<[WriteVq]> { bits<5> Vd; bits<5> Vn; let Inst{31-25} = 0b1100111; diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index 4f09569a16f0..7ef96e4e87c1 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -7006,9 +7006,9 @@ def AESIMCrr : AESInst< 0b0111, "aesimc", int_aarch64_crypto_aesimc>; // for AES fusion on some CPUs. let hasSideEffects = 0, mayStore = 0, mayLoad = 0 in { def AESMCrrTied: Pseudo<(outs V128:$Rd), (ins V128:$Rn), [], "$Rn = $Rd">, - Sched<[WriteV]>; + Sched<[WriteVq]>; def AESIMCrrTied: Pseudo<(outs V128:$Rd), (ins V128:$Rn), [], "$Rn = $Rd">, - Sched<[WriteV]>; + Sched<[WriteVq]>; } // Only use constrained versions of AES(I)MC instructions if they are paired with diff --git a/llvm/lib/Target/AArch64/AArch64SchedA53.td b/llvm/lib/Target/AArch64/AArch64SchedA53.td index 3fef369a4e2b..d18a05fda191 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedA53.td +++ b/llvm/lib/Target/AArch64/AArch64SchedA53.td @@ -127,7 +127,8 @@ def : WriteRes { let Latency = 6; } def : WriteRes { let Latency = 6; } def : WriteRes { let Latency = 6; } def : WriteRes { let Latency = 6; } -def : WriteRes { let Latency = 6; } +def : WriteRes { let Latency = 6; } +def : WriteRes { let Latency = 6; } // FP Mul, Div, Sqrt def : WriteRes { let Latency = 6; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedA55.td b/llvm/lib/Target/AArch64/AArch64SchedA55.td index 34d6fb5fb306..877c4d2ced41 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedA55.td +++ b/llvm/lib/Target/AArch64/AArch64SchedA55.td @@ -149,9 +149,11 @@ def : WriteRes { let Latency = 3; } def : WriteRes { let Latency = 4; } def : WriteRes { let Latency = 3; } def : WriteRes { let Latency = 3; } -def : WriteRes { let Latency = 4; } +def : WriteRes { let Latency = 4; } +def : WriteRes { let Latency = 4; let BeginGroup = 1; } // FP ALU specific new schedwrite definitions +def CortexA55WriteFPALU_F2 : SchedWriteRes<[CortexA55UnitFPALU]> { let Latency = 2;} def CortexA55WriteFPALU_F3 : SchedWriteRes<[CortexA55UnitFPALU]> { let Latency = 3;} def CortexA55WriteFPALU_F4 : SchedWriteRes<[CortexA55UnitFPALU]> { let Latency = 4;} def CortexA55WriteFPALU_F5 : SchedWriteRes<[CortexA55UnitFPALU]> { let Latency = 5;} @@ -331,6 +333,8 @@ def : InstRW<[CortexA55WriteVST4, WriteAdr], (instregex "ST4Fourv(8b|4h|2s|1d|16 //--- // Floating Point Conversions, MAC, DIV, SQRT //--- +def : InstRW<[CortexA55WriteFPALU_F2], (instregex "^DUP(v2i64|v4i32|v8i16|v16i8)")>; +def : InstRW<[CortexA55WriteFPALU_F2], (instregex "^XTN")>; def : InstRW<[CortexA55WriteFPALU_F3], (instregex "^FCVT[ALMNPZ][SU](S|U)?(W|X)")>; def : InstRW<[CortexA55WriteFPALU_F4], (instregex "^FCVT(X)?[ALMNPXZ](S|U|N)?v")>; diff --git a/llvm/lib/Target/AArch64/AArch64SchedA57.td b/llvm/lib/Target/AArch64/AArch64SchedA57.td index c9addac18ba7..168a762241ca 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedA57.td +++ b/llvm/lib/Target/AArch64/AArch64SchedA57.td @@ -96,7 +96,8 @@ def : SchedAlias; def : SchedAlias; def : WriteRes { let Latency = 5;} def : SchedAlias; -def : SchedAlias; +def : SchedAlias; +def : SchedAlias; def : SchedAlias; def : SchedAlias; diff --git a/llvm/lib/Target/AArch64/AArch64SchedA64FX.td b/llvm/lib/Target/AArch64/AArch64SchedA64FX.td index dc551364ed6f..1d25a6c00f95 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedA64FX.td +++ b/llvm/lib/Target/AArch64/AArch64SchedA64FX.td @@ -1627,7 +1627,11 @@ def : InstRW<[A64FXWrite_FMOV_VG14], (instrs FMOVDXHighr)>; // ASIMD shift by register, basic, Q-form // ASIMD shift by register, complex, D-form // ASIMD shift by register, complex, Q-form -def : WriteRes { +def : WriteRes { + let Latency = 4; + let ResourceCycles = [1]; +} +def : WriteRes { let Latency = 4; let ResourceCycles = [1]; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedCyclone.td b/llvm/lib/Target/AArch64/AArch64SchedCyclone.td index 310c240966f9..9fbb46919427 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedCyclone.td +++ b/llvm/lib/Target/AArch64/AArch64SchedCyclone.td @@ -304,7 +304,8 @@ def : WriteRes {let Latency = -1;} // 7.9 Vector Unit Instructions // Simple vector operations take 2 cycles. -def : WriteRes {let Latency = 2;} +def : WriteRes {let Latency = 2;} +def : WriteRes {let Latency = 2;} // Define some longer latency vector op types for Cyclone. def CyWriteV3 : SchedWriteRes<[CyUnitV]> {let Latency = 3;} @@ -335,7 +336,7 @@ def : WriteRes {let Latency = 2;} // COPY is handled above in the WriteMov Variant. def WriteVMov : SchedWriteVariant<[ SchedVar, - SchedVar]>; + SchedVar]>; def : InstRW<[WriteVMov], (instrs ORRv16i8)>; // FMOVSr,FMOVDr are WriteF. @@ -355,7 +356,7 @@ def : WriteRes { def : InstRW<[WriteLD], (instrs FMOVSWr,FMOVDXr,FMOVDXHighr)>; // INS V[x],R -def CyWriteCopyToFPR : WriteSequence<[WriteVLD, WriteV]>; +def CyWriteCopyToFPR : WriteSequence<[WriteVLD, WriteVq]>; def : InstRW<[CyWriteCopyToFPR], (instregex "INSv")>; // SMOV,UMOV R,V[x] @@ -571,7 +572,7 @@ def : InstRW<[WriteFRSQRTS], (instregex "FRSQRTSv")>; //--- // FCVT lengthen f16/s32 -def : InstRW<[WriteV], (instrs FCVTSHr,FCVTDHr,FCVTDSr)>; +def : InstRW<[WriteVq], (instrs FCVTSHr,FCVTDHr,FCVTDSr)>; // FCVT,FCVTN,FCVTXN // SCVTF,UCVTF V,V @@ -681,61 +682,61 @@ def : InstRW<[WriteVLDShuffle], def : InstRW<[WriteVLDShuffle, WriteAdr], (instregex "LD1Rv(8b|4h|2s|1d|16b|8h|4s|2d)_POST$")>; -def : InstRW<[WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, WriteVq], (instregex "LD2Twov(8b|4h|2s)$")>; -def : InstRW<[WriteVLDShuffle, WriteAdr, WriteV], +def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVq], (instregex "LD2Twov(8b|4h|2s)_POST$")>; def : InstRW<[WriteVLDShuffle, WriteVLDShuffle], (instregex "LD2Twov(16b|8h|4s|2d)$")>; def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle], (instregex "LD2Twov(16b|8h|4s|2d)_POST")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVq], (instregex "LD2i(8|16|32)$")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVq], (instregex "LD2i(8|16|32)_POST")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVq], (instregex "LD2i64$")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVq], (instregex "LD2i64_POST")>; -def : InstRW<[WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, WriteVq], (instregex "LD2Rv(8b|4h|2s|1d|16b|8h|4s|2d)$")>; -def : InstRW<[WriteVLDShuffle, WriteAdr, WriteV], +def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVq], (instregex "LD2Rv(8b|4h|2s|1d|16b|8h|4s|2d)_POST")>; -def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVq], (instregex "LD3Threev(8b|4h|2s)$")>; -def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVq], (instregex "LD3Threev(8b|4h|2s)_POST")>; def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVLDShuffle], (instregex "LD3Threev(16b|8h|4s|2d)$")>; def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVLDShuffle], (instregex "LD3Threev(16b|8h|4s|2d)_POST")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVq, WriteVq], (instregex "LD3i(8|16|32)$")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVq, WriteVq], (instregex "LD3i(8|16|32)_POST")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVLDShuffle, WriteVq], (instregex "LD3i64$")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVLDShuffle, WriteVq], (instregex "LD3i64_POST")>; -def : InstRW<[WriteVLDShuffle, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, WriteVq, WriteVq], (instregex "LD3Rv(8b|4h|2s|16b|8h|4s)$")>; -def : InstRW<[WriteVLDShuffle, WriteAdr, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVq, WriteVq], (instregex "LD3Rv(8b|4h|2s|16b|8h|4s)_POST")>; -def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVq], (instrs LD3Rv1d,LD3Rv2d)>; -def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVq], (instrs LD3Rv1d_POST,LD3Rv2d_POST)>; -def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVq, WriteVq], (instregex "LD4Fourv(8b|4h|2s)$")>; -def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVq, WriteVq], (instregex "LD4Fourv(8b|4h|2s)_POST")>; def : InstRW<[WriteVLDPairShuffle, WriteVLDPairShuffle, WriteVLDPairShuffle, WriteVLDPairShuffle], @@ -744,25 +745,25 @@ def : InstRW<[WriteVLDPairShuffle, WriteAdr, WriteVLDPairShuffle, WriteVLDPairShuffle, WriteVLDPairShuffle], (instregex "LD4Fourv(16b|8h|4s|2d)_POST")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteV, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVq, WriteVq, WriteVq], (instregex "LD4i(8|16|32)$")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteV, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVq, WriteVq, WriteVq], (instregex "LD4i(8|16|32)_POST")>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVLDShuffle, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteVLDShuffle, WriteVq, WriteVq], (instrs LD4i64)>; -def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVLDShuffle, WriteV], +def : InstRW<[WriteVLDShuffle, ReadVLD, WriteAdr, WriteVLDShuffle, WriteVq], (instrs LD4i64_POST)>; -def : InstRW<[WriteVLDShuffle, WriteV, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, WriteVq, WriteVq, WriteVq], (instregex "LD4Rv(8b|4h|2s|16b|8h|4s)$")>; -def : InstRW<[WriteVLDShuffle, WriteAdr, WriteV, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVq, WriteVq, WriteVq], (instregex "LD4Rv(8b|4h|2s|16b|8h|4s)_POST")>; -def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, WriteVLDShuffle, WriteVq, WriteVq], (instrs LD4Rv1d,LD4Rv2d)>; -def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteV, WriteV], +def : InstRW<[WriteVLDShuffle, WriteAdr, WriteVLDShuffle, WriteVq, WriteVq], (instrs LD4Rv1d_POST,LD4Rv2d_POST)>; //--- diff --git a/llvm/lib/Target/AArch64/AArch64SchedExynosM3.td b/llvm/lib/Target/AArch64/AArch64SchedExynosM3.td index a96917c9364a..14df8236504b 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedExynosM3.td +++ b/llvm/lib/Target/AArch64/AArch64SchedExynosM3.td @@ -254,7 +254,8 @@ def : WriteRes { let Latency = 3; } +def : WriteRes { let Latency = 3; } +def : WriteRes { let Latency = 3; } // Other miscellaneous instructions. def : WriteRes { let Unsupported = 1; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedExynosM4.td b/llvm/lib/Target/AArch64/AArch64SchedExynosM4.td index 8c5d6bbf0ceb..8f740a9a0d35 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedExynosM4.td +++ b/llvm/lib/Target/AArch64/AArch64SchedExynosM4.td @@ -558,7 +558,8 @@ def : SchedAlias; def : SchedAlias; // ASIMD FP instructions. -def : SchedAlias; +def : SchedAlias; +def : SchedAlias; // Other miscellaneous instructions. def : WriteRes { let Unsupported = 1; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedExynosM5.td b/llvm/lib/Target/AArch64/AArch64SchedExynosM5.td index 64f88d719aa9..93e1b66bea03 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedExynosM5.td +++ b/llvm/lib/Target/AArch64/AArch64SchedExynosM5.td @@ -594,7 +594,8 @@ def : SchedAlias; def : SchedAlias; // ASIMD FP instructions. -def : SchedAlias; +def : SchedAlias; +def : SchedAlias; // Other miscellaneous instructions. def : WriteRes { let Latency = 1; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedFalkor.td b/llvm/lib/Target/AArch64/AArch64SchedFalkor.td index 8c40efd07e8a..7c9b0afdd169 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedFalkor.td +++ b/llvm/lib/Target/AArch64/AArch64SchedFalkor.td @@ -92,7 +92,8 @@ def : WriteRes { let Unsupported = 1; } def : WriteRes { let Unsupported = 1; } def : WriteRes { let Unsupported = 1; } def : WriteRes { let Unsupported = 1; } -def : WriteRes { let Unsupported = 1; } +def : WriteRes { let Unsupported = 1; } +def : WriteRes { let Unsupported = 1; } def : WriteRes { let Unsupported = 1; } def : WriteRes { let Unsupported = 1; } def : WriteRes { let Unsupported = 1; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedKryo.td b/llvm/lib/Target/AArch64/AArch64SchedKryo.td index f824ce462fe0..cc568a2f2f17 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedKryo.td +++ b/llvm/lib/Target/AArch64/AArch64SchedKryo.td @@ -95,7 +95,8 @@ def : WriteRes { let Latency = 6; let NumMicroOps = 2; } def : WriteRes { let Latency = 12; let NumMicroOps = 2; } // Fragent -1 / NoRSV +1 -def : WriteRes { let Latency = 6; } +def : WriteRes { let Latency = 6; } +def : WriteRes { let Latency = 6; } def : WriteRes { let Latency = 4; } def : WriteRes { let Latency = 4; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedTSV110.td b/llvm/lib/Target/AArch64/AArch64SchedTSV110.td index 4a1b5167e89d..77fca22a5f55 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedTSV110.td +++ b/llvm/lib/Target/AArch64/AArch64SchedTSV110.td @@ -90,7 +90,8 @@ def : WriteRes { let Latency = 5; } // FP Div, Sqrt def : WriteRes { let Latency = 18; } -def : WriteRes { let Latency = 4; } +def : WriteRes { let Latency = 4; } +def : WriteRes { let Latency = 4; } def : WriteRes { let Latency = 5; } def : WriteRes { let Latency = 1; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedThunderX.td b/llvm/lib/Target/AArch64/AArch64SchedThunderX.td index f41f12733e69..ff34c0ce9a0c 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedThunderX.td +++ b/llvm/lib/Target/AArch64/AArch64SchedThunderX.td @@ -154,7 +154,8 @@ def : WriteRes { let Latency = 6; } def : WriteRes { let Latency = 6; } def : WriteRes { let Latency = 6; } def : WriteRes { let Latency = 6; } -def : WriteRes { let Latency = 6; } +def : WriteRes { let Latency = 6; } +def : WriteRes { let Latency = 6; } // FP Mul, Div, Sqrt def : WriteRes { let Latency = 6; } diff --git a/llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td b/llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td index 0da286e942a0..e4cae97b5524 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td +++ b/llvm/lib/Target/AArch64/AArch64SchedThunderX2T99.td @@ -1250,7 +1250,12 @@ def : InstRW<[THX2T99Write_5Cyc_F01], (instrs FMOVXDHighr, FMOVDXHighr)>; // ASIMD shift by register, basic, Q-form // ASIMD shift by register, complex, D-form // ASIMD shift by register, complex, Q-form -def : WriteRes { +def : WriteRes { + let Latency = 7; + let NumMicroOps = 4; + let ResourceCycles = [4]; +} +def : WriteRes { let Latency = 7; let NumMicroOps = 4; let ResourceCycles = [4]; diff --git a/llvm/lib/Target/AArch64/AArch64SchedThunderX3T110.td b/llvm/lib/Target/AArch64/AArch64SchedThunderX3T110.td index 8f03be9be0dd..08be2b3a55b3 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedThunderX3T110.td +++ b/llvm/lib/Target/AArch64/AArch64SchedThunderX3T110.td @@ -1357,7 +1357,12 @@ def : InstRW<[THX3T110Write_5Cyc_F01], (instrs FMOVXDHighr, FMOVDXHighr)>; // ASIMD shift by register, basic, Q-form // ASIMD shift by register, complex, D-form // ASIMD shift by register, complex, Q-form -def : WriteRes { +def : WriteRes { + let Latency = 5; + let NumMicroOps = 4; + let ResourceCycles = [4]; +} +def : WriteRes { let Latency = 5; let NumMicroOps = 4; let ResourceCycles = [4]; diff --git a/llvm/lib/Target/AArch64/AArch64Schedule.td b/llvm/lib/Target/AArch64/AArch64Schedule.td index 4e5a67a3a394..b8572c9b4572 100644 --- a/llvm/lib/Target/AArch64/AArch64Schedule.td +++ b/llvm/lib/Target/AArch64/AArch64Schedule.td @@ -77,7 +77,8 @@ def WriteFImm : SchedWrite; // Floating-point immediate. def WriteFMul : SchedWrite; // Floating-point multiply. def WriteFDiv : SchedWrite; // Floating-point division. -def WriteV : SchedWrite; // Vector ops. +def WriteVd : SchedWrite; // 64bit Vector D ops. +def WriteVq : SchedWrite; // 128bit Vector Q ops. def WriteVLD : SchedWrite; // Vector loads. def WriteVST : SchedWrite; // Vector stores. @@ -87,9 +88,9 @@ def WriteAtomic : SchedWrite; // Atomic memory operations (CAS, Swap, LDOP) def ReadVLD : SchedRead; // Sequential vector load and shuffle. -def WriteVLDShuffle : WriteSequence<[WriteVLD, WriteV]>; -def WriteVLDPairShuffle : WriteSequence<[WriteVLD, WriteV, WriteV]>; +def WriteVLDShuffle : WriteSequence<[WriteVLD, WriteVq]>; +def WriteVLDPairShuffle : WriteSequence<[WriteVLD, WriteVq, WriteVq]>; // Store a shuffled vector. -def WriteVSTShuffle : WriteSequence<[WriteV, WriteVST]>; -def WriteVSTPairShuffle : WriteSequence<[WriteV, WriteV, WriteVST]>; +def WriteVSTShuffle : WriteSequence<[WriteVq, WriteVST]>; +def WriteVSTPairShuffle : WriteSequence<[WriteVq, WriteVq, WriteVST]>; diff --git a/llvm/test/tools/llvm-mca/AArch64/Cortex/A55-neon-instructions.s b/llvm/test/tools/llvm-mca/AArch64/Cortex/A55-neon-instructions.s index c323c7482ca3..fe34b839f390 100644 --- a/llvm/test/tools/llvm-mca/AArch64/Cortex/A55-neon-instructions.s +++ b/llvm/test/tools/llvm-mca/AArch64/Cortex/A55-neon-instructions.s @@ -1071,45 +1071,45 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK: [1] [2] [3] [4] [5] [6] Instructions: # CHECK-NEXT: 1 4 0.50 abs d29, d24 -# CHECK-NEXT: 1 4 0.50 abs v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 abs v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 abs v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 abs v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 abs v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 abs v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 abs v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 abs v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 abs v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 abs v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 abs v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 add d17, d31, d29 # CHECK-NEXT: 1 4 0.50 add v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 addhn v0.2s, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 addhn v0.4h, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 addhn v0.8b, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 addhn2 v0.16b, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 addhn2 v0.4s, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 addhn2 v0.8h, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 addp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 addhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 addhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 addhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 addhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 addhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 addhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 addp v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 addp v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 and v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 bic v0.4h, #15, lsl #8 # CHECK-NEXT: 1 4 0.50 bic v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 bif v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 bit v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 bif v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 bit v0.16b, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 bsl v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 cls v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 cls v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 cls v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 cls v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 cls v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 cls v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 cls v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 cls v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 clz v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 cls v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 clz v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 clz v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 clz v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 clz v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 clz v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 clz v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 clz v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 clz v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 cmeq d20, d21, #0 # CHECK-NEXT: 1 4 0.50 cmeq d20, d21, d22 -# CHECK-NEXT: 1 4 0.50 cmeq v0.16b, v0.16b, #0 -# CHECK-NEXT: 1 4 0.50 cmeq v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 cmeq v0.16b, v0.16b, #0 +# CHECK-NEXT: 1 4 1.00 cmeq v0.16b, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 cmge d20, d21, #0 # CHECK-NEXT: 1 4 0.50 cmge d20, d21, d22 # CHECK-NEXT: 1 4 0.50 cmge v0.4h, v0.4h, v0.4h @@ -1117,46 +1117,46 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 cmgt d20, d21, #0 # CHECK-NEXT: 1 4 0.50 cmgt d20, d21, d22 # CHECK-NEXT: 1 4 0.50 cmgt v0.2s, v0.2s, #0 -# CHECK-NEXT: 1 4 0.50 cmgt v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 cmgt v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 cmhi d20, d21, d22 -# CHECK-NEXT: 1 4 0.50 cmhi v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 cmhi v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 cmhs d20, d21, d22 # CHECK-NEXT: 1 4 0.50 cmhs v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 cmle d20, d21, #0 -# CHECK-NEXT: 1 4 0.50 cmle v0.2d, v0.2d, #0 +# CHECK-NEXT: 1 4 1.00 cmle v0.2d, v0.2d, #0 # CHECK-NEXT: 1 4 0.50 cmlt d20, d21, #0 -# CHECK-NEXT: 1 4 0.50 cmlt v0.8h, v0.8h, #0 +# CHECK-NEXT: 1 4 1.00 cmlt v0.8h, v0.8h, #0 # CHECK-NEXT: 1 4 0.50 cmtst d20, d21, d22 # CHECK-NEXT: 1 4 0.50 cmtst v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 cnt v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 cnt v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 cnt v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 dup v0.16b, w28 -# CHECK-NEXT: 1 4 0.50 dup v0.2d, x28 +# CHECK-NEXT: 1 2 0.50 dup v0.16b, w28 +# CHECK-NEXT: 1 2 0.50 dup v0.2d, x28 # CHECK-NEXT: 1 4 0.50 dup v0.2s, w28 # CHECK-NEXT: 1 4 0.50 dup v0.4h, w28 -# CHECK-NEXT: 1 4 0.50 dup v0.4s, w28 +# CHECK-NEXT: 1 2 0.50 dup v0.4s, w28 # CHECK-NEXT: 1 4 0.50 dup v0.8b, w28 -# CHECK-NEXT: 1 4 0.50 dup v0.8h, w28 -# CHECK-NEXT: 1 4 0.50 eor v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 ext v0.16b, v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 2 0.50 dup v0.8h, w28 +# CHECK-NEXT: 1 4 1.00 eor v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 ext v0.16b, v0.16b, v0.16b, #3 # CHECK-NEXT: 1 4 0.50 ext v0.8b, v0.8b, v0.8b, #3 # CHECK-NEXT: 1 4 0.50 fabd d29, d24, d20 # CHECK-NEXT: 1 4 0.50 fabd s29, s24, s20 -# CHECK-NEXT: 1 4 0.50 fabd v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fabs v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fabd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fabs v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fabs v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 fabs v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 fabs v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fabs v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 fabs v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fabs v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 facge d20, d21, d22 # CHECK-NEXT: 1 4 0.50 facge s10, s11, s12 -# CHECK-NEXT: 1 4 0.50 facge v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 facge v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 facgt d20, d21, d22 # CHECK-NEXT: 1 4 0.50 facgt s10, s11, s12 -# CHECK-NEXT: 1 4 0.50 facgt v0.2d, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 fadd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 facgt v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fadd v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 faddp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 faddp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 faddp v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 fcmeq d20, d21, #0.0 # CHECK-NEXT: 1 4 0.50 fcmeq d20, d21, d22 # CHECK-NEXT: 1 4 0.50 fcmeq s10, s11, #0.0 @@ -1167,20 +1167,20 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 fcmge d20, d21, d22 # CHECK-NEXT: 1 4 0.50 fcmge s10, s11, #0.0 # CHECK-NEXT: 1 4 0.50 fcmge s10, s11, s12 -# CHECK-NEXT: 1 4 0.50 fcmge v0.2d, v0.2d, #0.0 -# CHECK-NEXT: 1 4 0.50 fcmge v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fcmge v0.2d, v0.2d, #0.0 +# CHECK-NEXT: 1 4 1.00 fcmge v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 fcmgt d20, d21, #0.0 # CHECK-NEXT: 1 4 0.50 fcmgt d20, d21, d22 # CHECK-NEXT: 1 4 0.50 fcmgt s10, s11, #0.0 # CHECK-NEXT: 1 4 0.50 fcmgt s10, s11, s12 -# CHECK-NEXT: 1 4 0.50 fcmgt v0.4s, v0.4s, #0.0 -# CHECK-NEXT: 1 4 0.50 fcmgt v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fcmgt v0.4s, v0.4s, #0.0 +# CHECK-NEXT: 1 4 1.00 fcmgt v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 fcmle d20, d21, #0.0 # CHECK-NEXT: 1 4 0.50 fcmle s10, s11, #0.0 -# CHECK-NEXT: 1 4 0.50 fcmle v0.2d, v0.2d, #0.0 +# CHECK-NEXT: 1 4 1.00 fcmle v0.2d, v0.2d, #0.0 # CHECK-NEXT: 1 4 0.50 fcmlt d20, d21, #0.0 # CHECK-NEXT: 1 4 0.50 fcmlt s10, s11, #0.0 -# CHECK-NEXT: 1 4 0.50 fcmlt v0.4s, v0.4s, #0.0 +# CHECK-NEXT: 1 4 1.00 fcmlt v0.4s, v0.4s, #0.0 # CHECK-NEXT: 1 4 0.50 fcvtas d21, d14 # CHECK-NEXT: 1 4 0.50 fcvtas s12, s13 # CHECK-NEXT: 1 4 0.50 fcvtas v0.2d, v0.2d @@ -1273,39 +1273,39 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 fcvtzu v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 fcvtzu v0.8h, v0.8h # CHECK-NEXT: 1 13 10.00 fdiv v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fmax v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fmax v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fmax v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fmax v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fmaxnm v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fmax v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fmaxnm v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fmaxnm v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fmaxnm v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fmaxnmp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fmaxnm v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fmaxnmp v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fmaxnmp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fmaxnmp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fmaxp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fmaxnmp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fmaxp v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fmaxp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fmaxp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fmin v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fmaxp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fmin v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fmin v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fmin v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fminnm v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fmin v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fminnm v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fminnm v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fminnm v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fminnmp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fminnm v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fminnmp v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fminnmp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fminnmp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fminp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fminnmp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fminp v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fminp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fminp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fminp v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 fmla d0, d1, v0.d[1] # CHECK-NEXT: 1 4 0.50 fmla s0, s1, v0.s[3] # CHECK-NEXT: 1 4 0.50 fmla v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 fmls d0, d4, v0.d[1] # CHECK-NEXT: 1 4 0.50 fmls s3, s5, v0.s[3] # CHECK-NEXT: 1 4 0.50 fmls v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fmov v0.2d, #-1.25000000 +# CHECK-NEXT: 1 4 1.00 fmov v0.2d, #-1.25000000 # CHECK-NEXT: 1 4 0.50 fmov v0.2s, #13.00000000 -# CHECK-NEXT: 1 4 0.50 fmov v0.4s, #1.00000000 +# CHECK-NEXT: 1 4 1.00 fmov v0.4s, #1.00000000 # CHECK-NEXT: 1 4 0.50 fmul d0, d1, v0.d[1] # CHECK-NEXT: 1 4 0.50 fmul s0, s1, v0.s[3] # CHECK-NEXT: 1 4 0.50 fmul v0.2s, v0.2s, v0.2s @@ -1313,61 +1313,61 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 fmulx d23, d11, d1 # CHECK-NEXT: 1 4 0.50 fmulx s20, s22, s15 # CHECK-NEXT: 1 4 0.50 fmulx s3, s5, v0.s[3] -# CHECK-NEXT: 1 4 0.50 fmulx v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fmulx v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fmulx v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 fmulx v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fneg v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 fmulx v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fneg v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 fneg v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 fneg v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 fneg v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 fneg v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 fneg v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 fneg v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 frecpe d13, d13 # CHECK-NEXT: 1 4 0.50 frecpe s19, s14 -# CHECK-NEXT: 1 4 0.50 frecpe v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 frecpe v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 frecpe v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 frecpe v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 frecpe v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 frecpe v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 frecps v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frecpe v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frecpe v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 frecps v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 frecps d22, d30, d21 # CHECK-NEXT: 1 4 0.50 frecps s21, s16, s13 # CHECK-NEXT: 1 4 0.50 frecpx d16, d19 # CHECK-NEXT: 1 4 0.50 frecpx s18, s10 -# CHECK-NEXT: 1 4 0.50 frinta v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 frinta v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 frinta v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 frinta v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 frinta v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 frinta v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 frinti v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 frinta v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frinta v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 frinti v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 frinti v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 frinti v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 frinti v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 frinti v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 frintm v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 frinti v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frinti v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 frintm v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 frintm v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 frintm v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 frintm v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 frintm v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 frintn v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 frintm v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frintm v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 frintn v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 frintn v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 frintn v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 frintn v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 frintn v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 frintp v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 frintn v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frintn v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 frintp v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 frintp v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 frintp v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 frintp v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 frintp v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 frintx v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 frintp v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frintp v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 frintx v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 frintx v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 frintx v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 frintx v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 frintx v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 frintz v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 frintx v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frintx v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 frintz v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 frintz v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 frintz v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 frintz v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 frintz v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 frintz v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 frintz v0.8h, v0.8h # CHECK-NEXT: 1 22 19.00 frsqrte d21, d12 # CHECK-NEXT: 1 12 9.00 frsqrte s22, s13 # CHECK-NEXT: 1 22 19.00 frsqrte v0.2d, v0.2d @@ -1429,104 +1429,104 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 mov d6, v0.d[1] # CHECK-NEXT: 1 4 0.50 mov h2, v0.h[5] # CHECK-NEXT: 1 4 0.50 mov s17, v0.s[2] -# CHECK-NEXT: 1 4 0.50 mov v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 mov v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 mov v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 movi d15, #0xff00ff00ff00ff -# CHECK-NEXT: 1 4 0.50 movi v0.16b, #31 -# CHECK-NEXT: 1 4 0.50 movi v0.2d, #0xff0000ff0000ffff +# CHECK-NEXT: 1 4 1.00 movi v0.16b, #31 +# CHECK-NEXT: 1 4 1.00 movi v0.2d, #0xff0000ff0000ffff # CHECK-NEXT: 1 4 0.50 movi v0.2s, #8, msl #8 -# CHECK-NEXT: 1 4 0.50 movi v0.4s, #255, lsl #24 +# CHECK-NEXT: 1 4 1.00 movi v0.4s, #255, lsl #24 # CHECK-NEXT: 1 4 0.50 movi v0.8b, #255 # CHECK-NEXT: 1 4 0.50 mul v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 mvni v0.2s, #0 -# CHECK-NEXT: 1 4 0.50 mvni v0.4s, #16, msl #16 +# CHECK-NEXT: 1 4 1.00 mvni v0.4s, #16, msl #16 # CHECK-NEXT: 1 4 0.50 neg d29, d24 -# CHECK-NEXT: 1 4 0.50 neg v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 neg v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 neg v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 neg v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 neg v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 neg v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 neg v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 neg v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 neg v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 neg v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 mvn v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 neg v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 mvn v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 mvn v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 orn v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 mov v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 orr v0.8h, #31 -# CHECK-NEXT: 1 4 0.50 pmul v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 orn v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 mov v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 orr v0.8h, #31 +# CHECK-NEXT: 1 4 1.00 pmul v0.16b, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 pmul v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 pmull v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 pmull2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 raddhn v0.2s, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 raddhn v0.4h, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 raddhn v0.8b, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 raddhn2 v0.16b, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 raddhn2 v0.4s, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 raddhn2 v0.8h, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 rbit v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 pmull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 pmull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 raddhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 raddhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 raddhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 raddhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 raddhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 raddhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 rbit v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 rbit v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 rev16 v21.8b, v1.8b -# CHECK-NEXT: 1 4 0.50 rev16 v30.16b, v31.16b +# CHECK-NEXT: 1 4 1.00 rev16 v30.16b, v31.16b # CHECK-NEXT: 1 4 0.50 rev32 v0.4h, v9.4h # CHECK-NEXT: 1 4 0.50 rev32 v21.8b, v1.8b -# CHECK-NEXT: 1 4 0.50 rev32 v30.16b, v31.16b -# CHECK-NEXT: 1 4 0.50 rev32 v4.8h, v7.8h -# CHECK-NEXT: 1 4 0.50 rev64 v0.16b, v31.16b +# CHECK-NEXT: 1 4 1.00 rev32 v30.16b, v31.16b +# CHECK-NEXT: 1 4 1.00 rev32 v4.8h, v7.8h +# CHECK-NEXT: 1 4 1.00 rev64 v0.16b, v31.16b # CHECK-NEXT: 1 4 0.50 rev64 v1.8b, v9.8b # CHECK-NEXT: 1 4 0.50 rev64 v13.4h, v21.4h -# CHECK-NEXT: 1 4 0.50 rev64 v2.8h, v4.8h +# CHECK-NEXT: 1 4 1.00 rev64 v2.8h, v4.8h # CHECK-NEXT: 1 4 0.50 rev64 v4.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 rev64 v6.4s, v8.4s +# CHECK-NEXT: 1 4 1.00 rev64 v6.4s, v8.4s # CHECK-NEXT: 1 4 0.50 rshrn v0.2s, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 rshrn v0.4h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 rshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 rshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 rshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 rshrn2 v0.8h, v0.4s, #3 -# CHECK-NEXT: 1 4 0.50 rsubhn v0.2s, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 rsubhn v0.4h, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 rsubhn v0.8b, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 rsubhn2 v0.16b, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 rsubhn2 v0.4s, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 rsubhn2 v0.8h, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 saba v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 sabal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 sabal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sabal v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 sabal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 sabal2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 sabal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 rshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 rshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 rshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 rsubhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 rsubhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 rsubhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 rsubhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 rsubhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 rsubhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 saba v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sabal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sabal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sabal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 sabal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sabal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sabal2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 sabd v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sabdl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 sabdl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sabdl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 sabdl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 sabdl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 sabdl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sabdl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sabdl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sabdl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 sabdl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sabdl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sabdl2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 sadalp v0.1d, v0.2s -# CHECK-NEXT: 1 4 0.50 sadalp v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 sadalp v0.2d, v0.4s # CHECK-NEXT: 1 4 0.50 sadalp v0.2s, v0.4h # CHECK-NEXT: 1 4 0.50 sadalp v0.4h, v0.8b -# CHECK-NEXT: 1 4 0.50 sadalp v0.4s, v0.8h -# CHECK-NEXT: 1 4 0.50 sadalp v0.8h, v0.16b -# CHECK-NEXT: 1 4 0.50 saddl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 saddl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 saddl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 saddl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 saddl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 saddl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sadalp v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 sadalp v0.8h, v0.16b +# CHECK-NEXT: 1 4 1.00 saddl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 saddl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 saddl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 saddl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 saddl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 saddl2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 saddlp v0.1d, v0.2s -# CHECK-NEXT: 1 4 0.50 saddlp v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 saddlp v0.2d, v0.4s # CHECK-NEXT: 1 4 0.50 saddlp v0.2s, v0.4h # CHECK-NEXT: 1 4 0.50 saddlp v0.4h, v0.8b -# CHECK-NEXT: 1 4 0.50 saddlp v0.4s, v0.8h -# CHECK-NEXT: 1 4 0.50 saddlp v0.8h, v0.16b -# CHECK-NEXT: 1 4 0.50 saddw v0.2d, v0.2d, v0.2s -# CHECK-NEXT: 1 4 0.50 saddw v0.4s, v0.4s, v0.4h -# CHECK-NEXT: 1 4 0.50 saddw v0.8h, v0.8h, v0.8b -# CHECK-NEXT: 1 4 0.50 saddw2 v0.2d, v0.2d, v0.4s -# CHECK-NEXT: 1 4 0.50 saddw2 v0.4s, v0.4s, v0.8h -# CHECK-NEXT: 1 4 0.50 saddw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: 1 4 1.00 saddlp v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 saddlp v0.8h, v0.16b +# CHECK-NEXT: 1 4 1.00 saddw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: 1 4 1.00 saddw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: 1 4 1.00 saddw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: 1 4 1.00 saddw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 saddw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 saddw2 v0.8h, v0.8h, v0.16b # CHECK-NEXT: 1 4 0.50 scvtf d21, d12 # CHECK-NEXT: 1 4 0.50 scvtf d21, d12, #64 # CHECK-NEXT: 1 4 0.50 scvtf s22, s13 @@ -1541,129 +1541,129 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 scvtf v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 shadd v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 shl d7, d10, #12 -# CHECK-NEXT: 1 4 0.50 shl v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 shl v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 shl v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 shl v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 shl v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 shl v0.4s, v0.4s, #3 -# CHECK-NEXT: 1 4 0.50 shll v0.2d, v0.2s, #32 -# CHECK-NEXT: 1 4 0.50 shll v0.4s, v0.4h, #16 -# CHECK-NEXT: 1 4 0.50 shll v0.8h, v0.8b, #8 -# CHECK-NEXT: 1 4 0.50 shll v0.2d, v0.2s, #32 -# CHECK-NEXT: 1 4 0.50 shll v0.4s, v0.4h, #16 -# CHECK-NEXT: 1 4 0.50 shll v0.8h, v0.8b, #8 -# CHECK-NEXT: 1 4 0.50 shll2 v0.2d, v0.4s, #32 -# CHECK-NEXT: 1 4 0.50 shll2 v0.4s, v0.8h, #16 -# CHECK-NEXT: 1 4 0.50 shll2 v0.8h, v0.16b, #8 -# CHECK-NEXT: 1 4 0.50 shll2 v0.2d, v0.4s, #32 -# CHECK-NEXT: 1 4 0.50 shll2 v0.4s, v0.8h, #16 -# CHECK-NEXT: 1 4 0.50 shll2 v0.8h, v0.16b, #8 +# CHECK-NEXT: 1 4 1.00 shl v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 shll v0.2d, v0.2s, #32 +# CHECK-NEXT: 1 4 1.00 shll v0.4s, v0.4h, #16 +# CHECK-NEXT: 1 4 1.00 shll v0.8h, v0.8b, #8 +# CHECK-NEXT: 1 4 1.00 shll v0.2d, v0.2s, #32 +# CHECK-NEXT: 1 4 1.00 shll v0.4s, v0.4h, #16 +# CHECK-NEXT: 1 4 1.00 shll v0.8h, v0.8b, #8 +# CHECK-NEXT: 1 4 1.00 shll2 v0.2d, v0.4s, #32 +# CHECK-NEXT: 1 4 1.00 shll2 v0.4s, v0.8h, #16 +# CHECK-NEXT: 1 4 1.00 shll2 v0.8h, v0.16b, #8 +# CHECK-NEXT: 1 4 1.00 shll2 v0.2d, v0.4s, #32 +# CHECK-NEXT: 1 4 1.00 shll2 v0.4s, v0.8h, #16 +# CHECK-NEXT: 1 4 1.00 shll2 v0.8h, v0.16b, #8 # CHECK-NEXT: 1 4 0.50 shrn v0.2s, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 shrn v0.4h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 shrn v0.8b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 shrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 shrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 shrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 shrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 shrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 shrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 shsub v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 shsub v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 sli d10, d14, #12 -# CHECK-NEXT: 1 4 0.50 sli v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 sli v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sli v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 sli v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sli v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 sli v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 sli v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sli v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sli v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 sli v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sli v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 smax v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 smax v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 smax v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 smaxp v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 smaxp v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 smaxp v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 smin v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 smin v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 smin v0.8h, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 sminp v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 sminp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 sminp v0.8h, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 smlal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 smlal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 smlal v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 smlal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 smlal2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 smlal2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 smlsl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 smlsl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 smlsl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 smlsl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 smlsl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 smlsl2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 smull v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 smull v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 smull v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 smull2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 smull2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 smull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 smin v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 smin v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 smin v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sminp v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sminp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sminp v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 smlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 smlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 smlal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 smlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 smlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 smlal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 smlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 smlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 smlsl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 smlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 smlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 smlsl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 smull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 smull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 smull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 smull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 smull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 smull2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 sqabs b19, b14 # CHECK-NEXT: 1 4 0.50 sqabs d18, d12 # CHECK-NEXT: 1 4 0.50 sqabs h21, h15 # CHECK-NEXT: 1 4 0.50 sqabs s20, s12 -# CHECK-NEXT: 1 4 0.50 sqabs v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 sqabs v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 sqabs v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sqabs v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 sqabs v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 sqabs v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sqabs v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqabs v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 sqabs v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 sqabs v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqabs v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 sqadd b20, b11, b15 -# CHECK-NEXT: 1 4 0.50 sqadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sqadd v0.16b, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 sqadd v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 sqdmlal d19, s24, s12 # CHECK-NEXT: 1 4 0.50 sqdmlal d8, s9, v0.s[1] # CHECK-NEXT: 1 4 0.50 sqdmlal s0, h0, v0.h[3] # CHECK-NEXT: 1 4 0.50 sqdmlal s17, h27, h12 -# CHECK-NEXT: 1 4 0.50 sqdmlal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 sqdmlal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sqdmlal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 sqdmlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqdmlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sqdmlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sqdmlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqdmlal2 v0.4s, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 sqdmlsl d12, s23, s13 # CHECK-NEXT: 1 4 0.50 sqdmlsl d8, s9, v0.s[1] # CHECK-NEXT: 1 4 0.50 sqdmlsl s0, h0, v0.h[3] # CHECK-NEXT: 1 4 0.50 sqdmlsl s14, h12, h25 -# CHECK-NEXT: 1 4 0.50 sqdmlsl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 sqdmlsl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sqdmlsl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 sqdmlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqdmlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sqdmlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sqdmlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqdmlsl2 v0.4s, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 sqdmulh h10, h11, h12 # CHECK-NEXT: 1 4 0.50 sqdmulh h7, h15, v0.h[3] # CHECK-NEXT: 1 4 0.50 sqdmulh s15, s14, v0.s[1] # CHECK-NEXT: 1 4 0.50 sqdmulh s20, s21, s2 # CHECK-NEXT: 1 4 0.50 sqdmulh v0.2s, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 sqdmulh v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqdmulh v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 sqdmull d1, s1, v0.s[1] # CHECK-NEXT: 1 4 0.50 sqdmull d15, s22, s12 # CHECK-NEXT: 1 4 0.50 sqdmull s1, h1, v0.h[3] # CHECK-NEXT: 1 4 0.50 sqdmull s12, h22, h12 -# CHECK-NEXT: 1 4 0.50 sqdmull v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 sqdmull v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sqdmull2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 sqdmull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqdmull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 sqdmull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 sqdmull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqdmull2 v0.4s, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 sqneg b19, b14 # CHECK-NEXT: 1 4 0.50 sqneg d18, d12 # CHECK-NEXT: 1 4 0.50 sqneg h21, h15 # CHECK-NEXT: 1 4 0.50 sqneg s20, s12 -# CHECK-NEXT: 1 4 0.50 sqneg v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 sqneg v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 sqneg v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 sqneg v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 sqneg v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 sqneg v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sqneg v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqneg v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 sqneg v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 sqneg v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqneg v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 sqrdmulh h10, h11, h12 # CHECK-NEXT: 1 4 0.50 sqrdmulh h7, h15, v0.h[3] # CHECK-NEXT: 1 4 0.50 sqrdmulh s15, s14, v0.s[1] # CHECK-NEXT: 1 4 0.50 sqrdmulh s20, s21, s2 # CHECK-NEXT: 1 4 0.50 sqrdmulh v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sqrdmulh v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 sqrdmulh v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 sqrshl d31, d31, d31 # CHECK-NEXT: 1 4 0.50 sqrshl h3, h4, h15 # CHECK-NEXT: 1 4 0.50 sqrshl v0.2s, v0.2s, v0.2s @@ -1675,151 +1675,151 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 sqrshrn v0.2s, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sqrshrn v0.4h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqrshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 sqrshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 sqrshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 sqrshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqrshrun b17, h10, #6 # CHECK-NEXT: 1 4 0.50 sqrshrun h10, s13, #15 # CHECK-NEXT: 1 4 0.50 sqrshrun s22, d16, #31 # CHECK-NEXT: 1 4 0.50 sqrshrun v0.2s, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sqrshrun v0.4h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqrshrun v0.8b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 sqrshrun2 v0.16b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 sqrshrun2 v0.4s, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 sqrshrun2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrun2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrun2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqrshrun2 v0.8h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqshl b11, b19, #7 # CHECK-NEXT: 1 4 0.50 sqshl d15, d16, #51 # CHECK-NEXT: 1 4 0.50 sqshl d31, d31, d31 # CHECK-NEXT: 1 4 0.50 sqshl h13, h18, #11 # CHECK-NEXT: 1 4 0.50 sqshl h3, h4, h15 # CHECK-NEXT: 1 4 0.50 sqshl s14, s17, #22 -# CHECK-NEXT: 1 4 0.50 sqshl v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 sqshl v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sqshl v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 sqshl v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 sqshl v0.4h, v0.4h, #3 # CHECK-NEXT: 1 4 0.50 sqshl v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 sqshl v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqshl v0.8b, v0.8b, #3 # CHECK-NEXT: 1 4 0.50 sqshl v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 sqshl v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqshl v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 sqshlu b15, b18, #6 # CHECK-NEXT: 1 4 0.50 sqshlu d11, d13, #32 # CHECK-NEXT: 1 4 0.50 sqshlu h19, h17, #6 # CHECK-NEXT: 1 4 0.50 sqshlu s16, s14, #25 -# CHECK-NEXT: 1 4 0.50 sqshlu v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 sqshlu v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sqshlu v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 sqshlu v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 sqshlu v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqshlu v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 sqshlu v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqshlu v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 sqshrn b10, h15, #5 # CHECK-NEXT: 1 4 0.50 sqshrn h17, s10, #4 # CHECK-NEXT: 1 4 0.50 sqshrn s18, d10, #31 # CHECK-NEXT: 1 4 0.50 sqshrn v0.2s, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sqshrn v0.4h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 sqshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 sqshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 sqshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqshrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqshrun b15, h10, #7 # CHECK-NEXT: 1 4 0.50 sqshrun h20, s14, #3 # CHECK-NEXT: 1 4 0.50 sqshrun s10, d15, #15 # CHECK-NEXT: 1 4 0.50 sqshrun v0.2s, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sqshrun v0.4h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqshrun v0.8b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 sqshrun2 v0.16b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 sqshrun2 v0.4s, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 sqshrun2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sqshrun2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sqshrun2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sqshrun2 v0.8h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sqsub s20, s10, s7 -# CHECK-NEXT: 1 4 0.50 sqsub v0.2d, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 sqsub v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 sqsub v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 sqsub v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 sqsub v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 sqxtn b18, h18 # CHECK-NEXT: 1 4 0.50 sqxtn h20, s17 # CHECK-NEXT: 1 4 0.50 sqxtn s19, d14 -# CHECK-NEXT: 1 4 0.50 sqxtn v0.2s, v0.2d -# CHECK-NEXT: 1 4 0.50 sqxtn v0.4h, v0.4s -# CHECK-NEXT: 1 4 0.50 sqxtn v0.8b, v0.8h -# CHECK-NEXT: 1 4 0.50 sqxtn2 v0.16b, v0.8h -# CHECK-NEXT: 1 4 0.50 sqxtn2 v0.4s, v0.2d -# CHECK-NEXT: 1 4 0.50 sqxtn2 v0.8h, v0.4s +# CHECK-NEXT: 1 4 1.00 sqxtn v0.2s, v0.2d +# CHECK-NEXT: 1 4 1.00 sqxtn v0.4h, v0.4s +# CHECK-NEXT: 1 4 1.00 sqxtn v0.8b, v0.8h +# CHECK-NEXT: 1 4 1.00 sqxtn2 v0.16b, v0.8h +# CHECK-NEXT: 1 4 1.00 sqxtn2 v0.4s, v0.2d +# CHECK-NEXT: 1 4 1.00 sqxtn2 v0.8h, v0.4s # CHECK-NEXT: 1 4 0.50 sqxtun b19, h14 # CHECK-NEXT: 1 4 0.50 sqxtun h21, s15 # CHECK-NEXT: 1 4 0.50 sqxtun s20, d12 -# CHECK-NEXT: 1 4 0.50 sqxtun v0.2s, v0.2d -# CHECK-NEXT: 1 4 0.50 sqxtun v0.4h, v0.4s -# CHECK-NEXT: 1 4 0.50 sqxtun v0.8b, v0.8h -# CHECK-NEXT: 1 4 0.50 sqxtun2 v0.16b, v0.8h -# CHECK-NEXT: 1 4 0.50 sqxtun2 v0.4s, v0.2d -# CHECK-NEXT: 1 4 0.50 sqxtun2 v0.8h, v0.4s +# CHECK-NEXT: 1 4 1.00 sqxtun v0.2s, v0.2d +# CHECK-NEXT: 1 4 1.00 sqxtun v0.4h, v0.4s +# CHECK-NEXT: 1 4 1.00 sqxtun v0.8b, v0.8h +# CHECK-NEXT: 1 4 1.00 sqxtun2 v0.16b, v0.8h +# CHECK-NEXT: 1 4 1.00 sqxtun2 v0.4s, v0.2d +# CHECK-NEXT: 1 4 1.00 sqxtun2 v0.8h, v0.4s # CHECK-NEXT: 1 4 0.50 srhadd v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 srhadd v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 srhadd v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 sri d10, d12, #14 -# CHECK-NEXT: 1 4 0.50 sri v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 sri v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sri v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 sri v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sri v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 sri v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 sri v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sri v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sri v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 sri v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sri v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 srshl d16, d16, d16 # CHECK-NEXT: 1 4 0.50 srshl v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 srshl v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 srshl v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 srshr d19, d18, #7 -# CHECK-NEXT: 1 4 0.50 srshr v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 srshr v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 srshr v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 srshr v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 srshr v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 srshr v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 srshr v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 srshr v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 srsra d15, d11, #19 -# CHECK-NEXT: 1 4 0.50 srsra v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 srsra v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 srsra v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 srsra v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 srsra v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 srsra v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 srsra v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 srsra v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 sshl d31, d31, d31 -# CHECK-NEXT: 1 4 0.50 sshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 sshl v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 sshl v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 sshl v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 sshl v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 sshll v0.2d, v0.2s, #3 -# CHECK-NEXT: 1 4 0.50 sshll2 v0.4s, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sshll2 v0.4s, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 sshr d15, d16, #12 -# CHECK-NEXT: 1 4 0.50 sshr v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 sshr v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 sshr v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 sshr v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 sshr v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 sshr v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 sshr v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 sshr v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 sshr v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 sshr v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 sshr v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 ssra d18, d12, #21 -# CHECK-NEXT: 1 4 0.50 ssra v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 ssra v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 ssra v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 ssra v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 ssra v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 ssra v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 ssra v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 ssra v0.8h, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 ssubl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 ssubl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 ssubl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 ssubl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 ssubl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 ssubl2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 ssubw v0.2d, v0.2d, v0.2s -# CHECK-NEXT: 1 4 0.50 ssubw v0.4s, v0.4s, v0.4h -# CHECK-NEXT: 1 4 0.50 ssubw v0.8h, v0.8h, v0.8b -# CHECK-NEXT: 1 4 0.50 ssubw2 v0.2d, v0.2d, v0.4s -# CHECK-NEXT: 1 4 0.50 ssubw2 v0.4s, v0.4s, v0.8h -# CHECK-NEXT: 1 4 0.50 ssubw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: 1 4 1.00 ssra v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 ssubl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 ssubl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 ssubl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 ssubl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 ssubl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 ssubl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 ssubw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: 1 4 1.00 ssubw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: 1 4 1.00 ssubw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: 1 4 1.00 ssubw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 ssubw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 ssubw2 v0.8h, v0.8h, v0.16b # CHECK-NEXT: 1 4 1.00 * st1 { v0.16b }, [x0] # CHECK-NEXT: 2 5 2.00 * st1 { v0.2d, v1.2d, v2.2d }, [x0], #48 # CHECK-NEXT: 1 5 4.00 * st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] @@ -1843,86 +1843,86 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 5 2.00 * st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0] # CHECK-NEXT: 2 5 2.00 * st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5 # CHECK-NEXT: 1 4 0.50 sub d15, d5, d16 -# CHECK-NEXT: 1 4 0.50 sub v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 sub v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 suqadd b19, b14 # CHECK-NEXT: 1 4 0.50 suqadd d18, d22 # CHECK-NEXT: 1 4 0.50 suqadd h20, h15 # CHECK-NEXT: 1 4 0.50 suqadd s21, s12 -# CHECK-NEXT: 1 4 0.50 suqadd v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 suqadd v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 suqadd v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 suqadd v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 suqadd v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 suqadd v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 suqadd v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 suqadd v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 suqadd v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 suqadd v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 tbl v0.16b, { v0.16b }, v0.16b -# CHECK-NEXT: 1 4 0.50 tbl v0.16b, { v0.16b, v1.16b }, v0.16b -# CHECK-NEXT: 1 4 0.50 tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b -# CHECK-NEXT: 1 4 0.50 tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +# CHECK-NEXT: 1 4 1.00 suqadd v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 tbl v0.16b, { v0.16b }, v0.16b +# CHECK-NEXT: 1 4 1.00 tbl v0.16b, { v0.16b, v1.16b }, v0.16b +# CHECK-NEXT: 1 4 1.00 tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +# CHECK-NEXT: 1 4 1.00 tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b # CHECK-NEXT: 1 4 0.50 tbl v0.8b, { v0.16b }, v0.8b # CHECK-NEXT: 1 4 0.50 tbl v0.8b, { v0.16b, v1.16b }, v0.8b # CHECK-NEXT: 1 4 0.50 tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b # CHECK-NEXT: 1 4 0.50 tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b -# CHECK-NEXT: 1 4 0.50 tbx v0.16b, { v0.16b }, v0.16b -# CHECK-NEXT: 1 4 0.50 tbx v0.16b, { v0.16b, v1.16b }, v0.16b -# CHECK-NEXT: 1 4 0.50 tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b -# CHECK-NEXT: 1 4 0.50 tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +# CHECK-NEXT: 1 4 1.00 tbx v0.16b, { v0.16b }, v0.16b +# CHECK-NEXT: 1 4 1.00 tbx v0.16b, { v0.16b, v1.16b }, v0.16b +# CHECK-NEXT: 1 4 1.00 tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +# CHECK-NEXT: 1 4 1.00 tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b # CHECK-NEXT: 1 4 0.50 tbx v0.8b, { v0.16b }, v0.8b # CHECK-NEXT: 1 4 0.50 tbx v0.8b, { v0.16b, v1.16b }, v0.8b # CHECK-NEXT: 1 4 0.50 tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b # CHECK-NEXT: 1 4 0.50 tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b -# CHECK-NEXT: 1 4 0.50 trn1 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 trn1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 trn1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 trn1 v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 trn1 v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 trn1 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 trn1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 trn1 v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 trn1 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 trn1 v0.8h, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 trn2 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 trn2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 trn1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 trn2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 trn2 v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 trn2 v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 trn2 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 trn2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 trn2 v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 trn2 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 trn2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 trn2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 uaba v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 uabal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 uabal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 uabal v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 uabal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 uabal2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 uabal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uabal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 uabal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 uabal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 uabal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uabal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uabal2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 uabd v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 uabdl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 uabdl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 uabdl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 uabdl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 uabdl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 uabdl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uabdl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 uabdl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 uabdl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 uabdl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uabdl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uabdl2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 uadalp v0.1d, v0.2s -# CHECK-NEXT: 1 4 0.50 uadalp v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 uadalp v0.2d, v0.4s # CHECK-NEXT: 1 4 0.50 uadalp v0.2s, v0.4h # CHECK-NEXT: 1 4 0.50 uadalp v0.4h, v0.8b -# CHECK-NEXT: 1 4 0.50 uadalp v0.4s, v0.8h -# CHECK-NEXT: 1 4 0.50 uadalp v0.8h, v0.16b -# CHECK-NEXT: 1 4 0.50 uaddl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 uaddl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 uaddl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 uaddl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 uaddl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 uaddl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uadalp v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 uadalp v0.8h, v0.16b +# CHECK-NEXT: 1 4 1.00 uaddl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 uaddl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 uaddl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 uaddl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uaddl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uaddl2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 uaddlp v0.1d, v0.2s -# CHECK-NEXT: 1 4 0.50 uaddlp v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 uaddlp v0.2d, v0.4s # CHECK-NEXT: 1 4 0.50 uaddlp v0.2s, v0.4h # CHECK-NEXT: 1 4 0.50 uaddlp v0.4h, v0.8b -# CHECK-NEXT: 1 4 0.50 uaddlp v0.4s, v0.8h -# CHECK-NEXT: 1 4 0.50 uaddlp v0.8h, v0.16b -# CHECK-NEXT: 1 4 0.50 uaddw v0.2d, v0.2d, v0.2s -# CHECK-NEXT: 1 4 0.50 uaddw v0.4s, v0.4s, v0.4h -# CHECK-NEXT: 1 4 0.50 uaddw v0.8h, v0.8h, v0.8b -# CHECK-NEXT: 1 4 0.50 uaddw2 v0.2d, v0.2d, v0.4s -# CHECK-NEXT: 1 4 0.50 uaddw2 v0.4s, v0.4s, v0.8h -# CHECK-NEXT: 1 4 0.50 uaddw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: 1 4 1.00 uaddlp v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 uaddlp v0.8h, v0.16b +# CHECK-NEXT: 1 4 1.00 uaddw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: 1 4 1.00 uaddw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: 1 4 1.00 uaddw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: 1 4 1.00 uaddw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 uaddw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 uaddw2 v0.8h, v0.8h, v0.16b # CHECK-NEXT: 1 4 0.50 ucvtf d21, d14 # CHECK-NEXT: 1 4 0.50 ucvtf d21, d14, #64 # CHECK-NEXT: 1 4 0.50 ucvtf s22, s13 @@ -1935,200 +1935,200 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 ucvtf v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 ucvtf v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 ucvtf v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 uhadd v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 uhadd v0.8h, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 uhsub v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 umax v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 umax v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 umax v0.8h, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 umaxp v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 umaxp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 umaxp v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uhadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uhadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uhsub v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umax v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 umax v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umax v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 umaxp v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 umaxp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umaxp v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 umin v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 umin v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 umin v0.8b, v0.8b, v0.8b # CHECK-NEXT: 1 4 0.50 uminp v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 uminp v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 uminp v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 umlal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 umlal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 umlal v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 umlal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 umlal2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 umlal2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 umlsl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 umlsl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 umlsl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 umlsl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 umlsl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 umlsl2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 umull v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 umull v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 umull v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 umull2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 umull2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 umull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 umlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 umlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 umlal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 umlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 umlal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 umlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 umlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 umlsl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 umlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 umlsl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 umull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 umull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 umull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 umull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 umull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 umull2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: 1 4 0.50 uqadd h0, h1, h5 -# CHECK-NEXT: 1 4 0.50 uqadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uqadd v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 uqrshl b11, b20, b30 # CHECK-NEXT: 1 4 0.50 uqrshl s23, s20, s16 -# CHECK-NEXT: 1 4 0.50 uqrshl v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 uqrshl v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 uqrshl v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 uqrshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uqrshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uqrshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uqrshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uqrshl v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 uqrshrn b10, h12, #5 # CHECK-NEXT: 1 4 0.50 uqrshrn h12, s10, #14 # CHECK-NEXT: 1 4 0.50 uqrshrn s10, d10, #25 # CHECK-NEXT: 1 4 0.50 uqrshrn v0.2s, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 uqrshrn v0.4h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 uqrshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 uqrshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 uqrshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 uqrshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 uqrshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 uqrshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 uqrshrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 uqshl b11, b20, b30 # CHECK-NEXT: 1 4 0.50 uqshl b18, b15, #6 # CHECK-NEXT: 1 4 0.50 uqshl d15, d12, #19 # CHECK-NEXT: 1 4 0.50 uqshl h11, h18, #7 # CHECK-NEXT: 1 4 0.50 uqshl s14, s19, #18 # CHECK-NEXT: 1 4 0.50 uqshl s23, s20, s16 -# CHECK-NEXT: 1 4 0.50 uqshl v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 uqshl v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 uqshl v0.2d, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 uqshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 uqshl v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uqshl v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 uqshl v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 uqshl v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 uqshl v0.4s, v0.4s, #3 -# CHECK-NEXT: 1 4 0.50 uqshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uqshl v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 uqshl v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 uqshl v0.8h, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 uqshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uqshl v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 uqshl v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 uqshrn b12, h10, #7 # CHECK-NEXT: 1 4 0.50 uqshrn h10, s14, #5 # CHECK-NEXT: 1 4 0.50 uqshrn s10, d12, #13 # CHECK-NEXT: 1 4 0.50 uqshrn v0.2s, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 uqshrn v0.4h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 uqshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 uqshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 uqshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: 1 4 0.50 uqshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 uqshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 uqshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 uqshrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 uqsub d16, d16, d16 # CHECK-NEXT: 1 4 0.50 uqsub v0.4h, v0.4h, v0.4h # CHECK-NEXT: 1 4 0.50 uqxtn b18, h18 # CHECK-NEXT: 1 4 0.50 uqxtn h20, s17 # CHECK-NEXT: 1 4 0.50 uqxtn s19, d14 -# CHECK-NEXT: 1 4 0.50 uqxtn v0.2s, v0.2d -# CHECK-NEXT: 1 4 0.50 uqxtn v0.4h, v0.4s -# CHECK-NEXT: 1 4 0.50 uqxtn v0.8b, v0.8h -# CHECK-NEXT: 1 4 0.50 uqxtn2 v0.16b, v0.8h -# CHECK-NEXT: 1 4 0.50 uqxtn2 v0.4s, v0.2d -# CHECK-NEXT: 1 4 0.50 uqxtn2 v0.8h, v0.4s +# CHECK-NEXT: 1 4 1.00 uqxtn v0.2s, v0.2d +# CHECK-NEXT: 1 4 1.00 uqxtn v0.4h, v0.4s +# CHECK-NEXT: 1 4 1.00 uqxtn v0.8b, v0.8h +# CHECK-NEXT: 1 4 1.00 uqxtn2 v0.16b, v0.8h +# CHECK-NEXT: 1 4 1.00 uqxtn2 v0.4s, v0.2d +# CHECK-NEXT: 1 4 1.00 uqxtn2 v0.8h, v0.4s # CHECK-NEXT: 1 4 0.50 urecpe v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 urecpe v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 urhadd v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 urhadd v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 urhadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 urecpe v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 urhadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 urhadd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 urhadd v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 urshl d8, d7, d4 -# CHECK-NEXT: 1 4 0.50 urshl v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 urshl v0.2d, v0.2d, v0.2d -# CHECK-NEXT: 1 4 0.50 urshl v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 urshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 urshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 urshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 urshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 urshl v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 urshr d20, d23, #31 -# CHECK-NEXT: 1 4 0.50 urshr v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 urshr v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 urshr v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 urshr v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 urshr v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 urshr v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 urshr v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 urshr v0.8h, v0.8h, #3 # CHECK-NEXT: 1 12 9.00 ursqrte v0.2s, v0.2s # CHECK-NEXT: 1 12 9.00 ursqrte v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 ursra d18, d10, #13 -# CHECK-NEXT: 1 4 0.50 ursra v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 ursra v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 ursra v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 ursra v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 ursra v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 ursra v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 ursra v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 ursra v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 ushl d0, d0, d0 -# CHECK-NEXT: 1 4 0.50 ushl v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 ushl v0.4s, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 ushl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 ushl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 ushl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 ushl v0.8h, v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 ushll v0.4s, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 ushll2 v0.8h, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 ushll2 v0.8h, v0.16b, #3 # CHECK-NEXT: 1 4 0.50 ushr d10, d17, #18 -# CHECK-NEXT: 1 4 0.50 ushr v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 ushr v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 ushr v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 ushr v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 ushr v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 ushr v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 ushr v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 ushr v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 ushr v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 ushr v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 ushr v0.8h, v0.8h, #3 # CHECK-NEXT: 1 4 0.50 usqadd b19, b14 # CHECK-NEXT: 1 4 0.50 usqadd d18, d22 # CHECK-NEXT: 1 4 0.50 usqadd h20, h15 # CHECK-NEXT: 1 4 0.50 usqadd s21, s12 -# CHECK-NEXT: 1 4 0.50 usqadd v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 usqadd v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 usqadd v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 usqadd v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 usqadd v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 usqadd v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 usqadd v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 usqadd v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 usqadd v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 usqadd v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 usqadd v0.8h, v0.8h # CHECK-NEXT: 1 4 0.50 usra d20, d13, #61 -# CHECK-NEXT: 1 4 0.50 usra v0.16b, v0.16b, #3 -# CHECK-NEXT: 1 4 0.50 usra v0.2d, v0.2d, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.16b, v0.16b, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.2d, v0.2d, #3 # CHECK-NEXT: 1 4 0.50 usra v0.2s, v0.2s, #3 # CHECK-NEXT: 1 4 0.50 usra v0.4h, v0.4h, #3 -# CHECK-NEXT: 1 4 0.50 usra v0.4s, v0.4s, #3 +# CHECK-NEXT: 1 4 1.00 usra v0.4s, v0.4s, #3 # CHECK-NEXT: 1 4 0.50 usra v0.8b, v0.8b, #3 -# CHECK-NEXT: 1 4 0.50 usra v0.8h, v0.8h, #3 -# CHECK-NEXT: 1 4 0.50 usubl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: 1 4 0.50 usubl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 usubl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 usubl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: 1 4 0.50 usubl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 usubl2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 usubw v0.2d, v0.2d, v0.2s -# CHECK-NEXT: 1 4 0.50 usubw v0.4s, v0.4s, v0.4h -# CHECK-NEXT: 1 4 0.50 usubw v0.8h, v0.8h, v0.8b -# CHECK-NEXT: 1 4 0.50 usubw2 v0.2d, v0.2d, v0.4s -# CHECK-NEXT: 1 4 0.50 usubw2 v0.4s, v0.4s, v0.8h -# CHECK-NEXT: 1 4 0.50 usubw2 v0.8h, v0.8h, v0.16b -# CHECK-NEXT: 1 4 0.50 uzp1 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 uzp1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 usra v0.8h, v0.8h, #3 +# CHECK-NEXT: 1 4 1.00 usubl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: 1 4 1.00 usubl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: 1 4 1.00 usubl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: 1 4 1.00 usubl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 usubl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 usubl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 usubw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: 1 4 1.00 usubw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: 1 4 1.00 usubw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: 1 4 1.00 usubw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: 1 4 1.00 usubw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: 1 4 1.00 usubw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: 1 4 1.00 uzp1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uzp1 v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 uzp1 v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 uzp1 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 uzp1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uzp1 v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 uzp1 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 uzp1 v0.8h, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 uzp2 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 uzp2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 uzp1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 uzp2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 uzp2 v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 uzp2 v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 uzp2 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 uzp2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 uzp2 v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 uzp2 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 uzp2 v0.8h, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 xtn v0.2s, v0.2d -# CHECK-NEXT: 1 4 0.50 xtn v0.4h, v0.4s -# CHECK-NEXT: 1 4 0.50 xtn v0.8b, v0.8h -# CHECK-NEXT: 1 4 0.50 xtn2 v0.16b, v0.8h -# CHECK-NEXT: 1 4 0.50 xtn2 v0.4s, v0.2d -# CHECK-NEXT: 1 4 0.50 xtn2 v0.8h, v0.4s -# CHECK-NEXT: 1 4 0.50 zip1 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 zip1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 uzp2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 2 0.50 xtn v0.2s, v0.2d +# CHECK-NEXT: 1 2 0.50 xtn v0.4h, v0.4s +# CHECK-NEXT: 1 2 0.50 xtn v0.8b, v0.8h +# CHECK-NEXT: 1 2 0.50 xtn2 v0.16b, v0.8h +# CHECK-NEXT: 1 2 0.50 xtn2 v0.4s, v0.2d +# CHECK-NEXT: 1 2 0.50 xtn2 v0.8h, v0.4s +# CHECK-NEXT: 1 4 1.00 zip1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 zip1 v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 zip1 v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 zip1 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 zip1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 zip1 v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 zip1 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 zip1 v0.8h, v0.8h, v0.8h -# CHECK-NEXT: 1 4 0.50 zip2 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: 1 4 0.50 zip2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: 1 4 1.00 zip1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 zip2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: 1 4 1.00 zip2 v0.2d, v0.2d, v0.2d # CHECK-NEXT: 1 4 0.50 zip2 v0.2s, v0.2s, v0.2s # CHECK-NEXT: 1 4 0.50 zip2 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: 1 4 0.50 zip2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: 1 4 1.00 zip2 v0.4s, v0.4s, v0.4s # CHECK-NEXT: 1 4 0.50 zip2 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: 1 4 0.50 zip2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: 1 4 1.00 zip2 v0.8h, v0.8h, v0.8h # CHECK: Resources: # CHECK-NEXT: [0.0] - CortexA55UnitALU @@ -2146,50 +2146,50 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0.0] [0.1] [1] [2] [3.0] [3.1] [4] [5.0] [5.1] [6] [7] [8] -# CHECK-NEXT: - - - - 487.00 487.00 197.00 3.00 3.00 107.00 - 52.00 +# CHECK-NEXT: - - - - 716.50 716.50 197.00 3.00 3.00 107.00 - 52.00 # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0.0] [0.1] [1] [2] [3.0] [3.1] [4] [5.0] [5.1] [6] [7] [8] Instructions: # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - abs d29, d24 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - abs v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - abs v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - abs v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - abs v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - abs v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - abs v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - abs v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - abs v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - abs v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - abs v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - abs v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - add d17, d31, d29 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - add v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - addhn v0.2s, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - addhn v0.4h, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - addhn v0.8b, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - addhn2 v0.16b, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - addhn2 v0.4s, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - addhn2 v0.8h, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - addp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - addhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - addhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - addhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - addhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - addhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - addhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - addp v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - addp v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - and v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - bic v0.4h, #15, lsl #8 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - bic v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - bif v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - bit v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - bif v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - bit v0.16b, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - bsl v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cls v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cls v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cls v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cls v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cls v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cls v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cls v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cls v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - clz v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cls v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - clz v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - clz v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - clz v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - clz v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - clz v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - clz v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - clz v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - clz v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmeq d20, d21, #0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmeq d20, d21, d22 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmeq v0.16b, v0.16b, #0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmeq v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cmeq v0.16b, v0.16b, #0 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cmeq v0.16b, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmge d20, d21, #0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmge d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmge v0.4h, v0.4h, v0.4h @@ -2197,18 +2197,18 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmgt d20, d21, #0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmgt d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmgt v0.2s, v0.2s, #0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmgt v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cmgt v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmhi d20, d21, d22 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmhi v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cmhi v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmhs d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmhs v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmle d20, d21, #0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmle v0.2d, v0.2d, #0 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cmle v0.2d, v0.2d, #0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmlt d20, d21, #0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmlt v0.8h, v0.8h, #0 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cmlt v0.8h, v0.8h, #0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmtst d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cmtst v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cnt v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - cnt v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - cnt v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - dup v0.16b, w28 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - dup v0.2d, x28 @@ -2217,26 +2217,26 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - dup v0.4s, w28 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - dup v0.8b, w28 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - dup v0.8h, w28 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - eor v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ext v0.16b, v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - eor v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ext v0.16b, v0.16b, v0.16b, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ext v0.8b, v0.8b, v0.8b, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fabd d29, d24, d20 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fabd s29, s24, s20 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fabd v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fabs v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fabd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fabs v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fabs v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fabs v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fabs v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fabs v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fabs v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fabs v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - facge d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - facge s10, s11, s12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - facge v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - facge v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - facgt d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - facgt s10, s11, s12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - facgt v0.2d, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fadd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - facgt v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fadd v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - faddp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - faddp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - faddp v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmeq d20, d21, #0.0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmeq d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmeq s10, s11, #0.0 @@ -2247,20 +2247,20 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmge d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmge s10, s11, #0.0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmge s10, s11, s12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmge v0.2d, v0.2d, #0.0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmge v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fcmge v0.2d, v0.2d, #0.0 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fcmge v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmgt d20, d21, #0.0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmgt d20, d21, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmgt s10, s11, #0.0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmgt s10, s11, s12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmgt v0.4s, v0.4s, #0.0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmgt v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fcmgt v0.4s, v0.4s, #0.0 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fcmgt v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmle d20, d21, #0.0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmle s10, s11, #0.0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmle v0.2d, v0.2d, #0.0 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fcmle v0.2d, v0.2d, #0.0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmlt d20, d21, #0.0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmlt s10, s11, #0.0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcmlt v0.4s, v0.4s, #0.0 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fcmlt v0.4s, v0.4s, #0.0 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcvtas d21, d14 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcvtas s12, s13 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcvtas v0.2d, v0.2d @@ -2353,39 +2353,39 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcvtzu v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fcvtzu v0.8h, v0.8h # CHECK-NEXT: - - - - - - 10.00 - - - - - fdiv v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmax v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmax v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmax v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmax v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxnm v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmax v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmaxnm v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxnm v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxnm v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxnmp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmaxnm v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmaxnmp v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxnmp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxnmp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmaxnmp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmaxp v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmaxp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmin v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmaxp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmin v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmin v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmin v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminnm v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmin v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fminnm v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminnm v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminnm v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminnmp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fminnm v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fminnmp v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminnmp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminnmp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminp v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fminnmp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fminp v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminp v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fminp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fminp v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - - - - 0.50 0.50 - - - fmla d0, d1, v0.d[1] # CHECK-NEXT: - - - - - - - 0.50 0.50 - - - fmla s0, s1, v0.s[3] # CHECK-NEXT: - - - - - - - 0.50 0.50 - - - fmla v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - - - - 0.50 0.50 - - - fmls d0, d4, v0.d[1] # CHECK-NEXT: - - - - - - - 0.50 0.50 - - - fmls s3, s5, v0.s[3] # CHECK-NEXT: - - - - - - - 0.50 0.50 - - - fmls v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmov v0.2d, #-1.25000000 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmov v0.2d, #-1.25000000 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmov v0.2s, #13.00000000 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmov v0.4s, #1.00000000 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmov v0.4s, #1.00000000 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmul d0, d1, v0.d[1] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmul s0, s1, v0.s[3] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmul v0.2s, v0.2s, v0.2s @@ -2393,61 +2393,61 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmulx d23, d11, d1 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmulx s20, s22, s15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmulx s3, s5, v0.s[3] -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmulx v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmulx v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmulx v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fmulx v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fneg v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fmulx v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fneg v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fneg v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fneg v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fneg v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - fneg v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fneg v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - fneg v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpe d13, d13 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpe s19, s14 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpe v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frecpe v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpe v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpe v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpe v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpe v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecps v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frecpe v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frecpe v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frecps v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecps d22, d30, d21 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecps s21, s16, s13 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpx d16, d19 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frecpx s18, s10 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinta v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frinta v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinta v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinta v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinta v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinta v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinti v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frinta v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frinta v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frinti v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinti v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinti v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinti v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frinti v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintm v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frinti v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frinti v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintm v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintm v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintm v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintm v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintm v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintn v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintm v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintm v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintn v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintn v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintn v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintn v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintn v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintp v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintn v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintn v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintp v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintp v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintp v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintp v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintp v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintx v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintp v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintp v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintx v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintx v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintx v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintx v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintx v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintz v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintx v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintx v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintz v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintz v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintz v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintz v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - frintz v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintz v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - frintz v0.8h, v0.8h # CHECK-NEXT: - - - - - - 19.00 - - - - - frsqrte d21, d12 # CHECK-NEXT: - - - - - - 9.00 - - - - - frsqrte s22, s13 # CHECK-NEXT: - - - - - - 19.00 - - - - - frsqrte v0.2d, v0.2d @@ -2509,104 +2509,104 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mov d6, v0.d[1] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mov h2, v0.h[5] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mov s17, v0.s[2] -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mov v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - mov v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mov v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - movi d15, #0xff00ff00ff00ff -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - movi v0.16b, #31 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - movi v0.2d, #0xff0000ff0000ffff +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - movi v0.16b, #31 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - movi v0.2d, #0xff0000ff0000ffff # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - movi v0.2s, #8, msl #8 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - movi v0.4s, #255, lsl #24 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - movi v0.4s, #255, lsl #24 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - movi v0.8b, #255 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mul v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mvni v0.2s, #0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mvni v0.4s, #16, msl #16 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - mvni v0.4s, #16, msl #16 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - neg d29, d24 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - neg v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - neg v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - neg v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - neg v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - neg v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - neg v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - neg v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - neg v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - neg v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - neg v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mvn v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - neg v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - mvn v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mvn v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - orn v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - mov v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - orr v0.8h, #31 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - pmul v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - orn v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - mov v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - orr v0.8h, #31 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - pmul v0.16b, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - pmul v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - pmull v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - pmull2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - raddhn v0.2s, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - raddhn v0.4h, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - raddhn v0.8b, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - raddhn2 v0.16b, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - raddhn2 v0.4s, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - raddhn2 v0.8h, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rbit v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - pmull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - pmull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - raddhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - raddhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - raddhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - raddhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - raddhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - raddhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rbit v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rbit v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev16 v21.8b, v1.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev16 v30.16b, v31.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rev16 v30.16b, v31.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev32 v0.4h, v9.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev32 v21.8b, v1.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev32 v30.16b, v31.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev32 v4.8h, v7.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev64 v0.16b, v31.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rev32 v30.16b, v31.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rev32 v4.8h, v7.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rev64 v0.16b, v31.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev64 v1.8b, v9.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev64 v13.4h, v21.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev64 v2.8h, v4.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rev64 v2.8h, v4.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev64 v4.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rev64 v6.4s, v8.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rev64 v6.4s, v8.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rshrn v0.2s, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rshrn v0.4h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rshrn2 v0.8h, v0.4s, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rsubhn v0.2s, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rsubhn v0.4h, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rsubhn v0.8b, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rsubhn2 v0.16b, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rsubhn2 v0.4s, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - rsubhn2 v0.8h, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saba v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabal v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabal2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rsubhn v0.2s, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rsubhn v0.4h, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rsubhn v0.8b, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rsubhn2 v0.16b, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rsubhn2 v0.4s, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - rsubhn2 v0.8h, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saba v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabal2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabd v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabdl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabdl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabdl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabdl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabdl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sabdl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabdl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabdl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabdl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabdl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabdl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sabdl2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sadalp v0.1d, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sadalp v0.2d, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sadalp v0.2d, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sadalp v0.2s, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sadalp v0.4h, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sadalp v0.4s, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sadalp v0.8h, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sadalp v0.4s, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sadalp v0.8h, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddl2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddlp v0.1d, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddlp v0.2d, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddlp v0.2d, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddlp v0.2s, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddlp v0.4h, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddlp v0.4s, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddlp v0.8h, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddw v0.2d, v0.2d, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddw v0.4s, v0.4s, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddw v0.8h, v0.8h, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddw2 v0.2d, v0.2d, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddw2 v0.4s, v0.4s, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - saddw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddlp v0.4s, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddlp v0.8h, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - saddw2 v0.8h, v0.8h, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - scvtf d21, d12 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - scvtf d21, d12, #64 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - scvtf s22, s13 @@ -2621,129 +2621,129 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - scvtf v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shadd v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shl d7, d10, #12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shl v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shl v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shl v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shl v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shl v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shl v0.4s, v0.4s, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll v0.2d, v0.2s, #32 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll v0.4s, v0.4h, #16 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll v0.8h, v0.8b, #8 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll v0.2d, v0.2s, #32 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll v0.4s, v0.4h, #16 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll v0.8h, v0.8b, #8 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll2 v0.2d, v0.4s, #32 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll2 v0.4s, v0.8h, #16 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll2 v0.8h, v0.16b, #8 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll2 v0.2d, v0.4s, #32 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll2 v0.4s, v0.8h, #16 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shll2 v0.8h, v0.16b, #8 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shl v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll v0.2d, v0.2s, #32 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll v0.4s, v0.4h, #16 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll v0.8h, v0.8b, #8 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll v0.2d, v0.2s, #32 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll v0.4s, v0.4h, #16 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll v0.8h, v0.8b, #8 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll2 v0.2d, v0.4s, #32 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll2 v0.4s, v0.8h, #16 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll2 v0.8h, v0.16b, #8 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll2 v0.2d, v0.4s, #32 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll2 v0.4s, v0.8h, #16 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shll2 v0.8h, v0.16b, #8 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shrn v0.2s, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shrn v0.4h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shrn v0.8b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - shrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shsub v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - shsub v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sli d10, d14, #12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sli v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sli v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sli v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sli v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sli v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sli v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sli v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sli v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sli v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sli v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sli v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smax v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smax v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smax v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smaxp v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smaxp v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smaxp v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smin v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smin v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smin v0.8h, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sminp v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sminp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sminp v0.8h, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlal v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlal2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlal2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlsl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlsl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlsl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlsl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlsl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smlsl2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smull v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smull v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smull v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smull2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smull2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - smull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smin v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smin v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smin v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sminp v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sminp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sminp v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlsl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smlsl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - smull2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs b19, b14 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs d18, d12 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs h21, h15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs s20, s12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqabs v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqabs v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqabs v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqabs v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqabs v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqadd b20, b11, b15 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqadd v0.16b, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqadd v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlal d19, s24, s12 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlal d8, s9, v0.s[1] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlal s0, h0, v0.h[3] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlal s17, h27, h12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmlal2 v0.4s, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlsl d12, s23, s13 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlsl d8, s9, v0.s[1] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlsl s0, h0, v0.h[3] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlsl s14, h12, h25 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlsl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlsl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlsl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmlsl2 v0.4s, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmulh h10, h11, h12 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmulh h7, h15, v0.h[3] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmulh s15, s14, v0.s[1] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmulh s20, s21, s2 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmulh v0.2s, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmulh v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmulh v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmull d1, s1, v0.s[1] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmull d15, s22, s12 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmull s1, h1, v0.h[3] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmull s12, h22, h12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmull v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmull v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmull2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqdmull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqdmull2 v0.4s, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg b19, b14 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg d18, d12 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg h21, h15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg s20, s12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqneg v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqneg v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqneg v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqneg v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqneg v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrdmulh h10, h11, h12 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrdmulh h7, h15, v0.h[3] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrdmulh s15, s14, v0.s[1] # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrdmulh s20, s21, s2 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrdmulh v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrdmulh v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqrdmulh v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshl d31, d31, d31 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshl h3, h4, h15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshl v0.2s, v0.2s, v0.2s @@ -2755,151 +2755,151 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrn v0.2s, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrn v0.4h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqrshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqrshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqrshrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun b17, h10, #6 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun h10, s13, #15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun s22, d16, #31 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun v0.2s, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun v0.4h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun v0.8b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun2 v0.16b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun2 v0.4s, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqrshrun2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqrshrun2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqrshrun2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqrshrun2 v0.8h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl b11, b19, #7 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl d15, d16, #51 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl d31, d31, d31 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl h13, h18, #11 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl h3, h4, h15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl s14, s17, #22 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshl v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshl v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.4h, v0.4h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshl v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.8b, v0.8b, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshl v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshl v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu b15, b18, #6 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu d11, d13, #32 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu h19, h17, #6 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu s16, s14, #25 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshlu v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshlu v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshlu v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshlu v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshlu v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn b10, h15, #5 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn h17, s10, #4 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn s18, d10, #31 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn v0.2s, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn v0.4h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun b15, h10, #7 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun h20, s14, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun s10, d15, #15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun v0.2s, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun v0.4h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun v0.8b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun2 v0.16b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun2 v0.4s, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqshrun2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshrun2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshrun2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqshrun2 v0.8h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqsub s20, s10, s7 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqsub v0.2d, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqsub v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqsub v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqsub v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqsub v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn b18, h18 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn h20, s17 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn s19, d14 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn v0.2s, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn v0.4h, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn v0.8b, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn2 v0.16b, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn2 v0.4s, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtn2 v0.8h, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtn v0.2s, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtn v0.4h, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtn v0.8b, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtn2 v0.16b, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtn2 v0.4s, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtn2 v0.8h, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun b19, h14 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun h21, s15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun s20, d12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun v0.2s, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun v0.4h, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun v0.8b, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun2 v0.16b, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun2 v0.4s, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sqxtun2 v0.8h, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtun v0.2s, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtun v0.4h, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtun v0.8b, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtun2 v0.16b, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtun2 v0.4s, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sqxtun2 v0.8h, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srhadd v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srhadd v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srhadd v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sri d10, d12, #14 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sri v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sri v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sri v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sri v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sri v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sri v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sri v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sri v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sri v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sri v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sri v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshl d16, d16, d16 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshl v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshl v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshl v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshr d19, d18, #7 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshr v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshr v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - srshr v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - srshr v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshr v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshr v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshr v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - srshr v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshr v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srshr v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - srshr v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srsra d15, d11, #19 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srsra v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srsra v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - srsra v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - srsra v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srsra v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srsra v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srsra v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - srsra v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srsra v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - srsra v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - srsra v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshl d31, d31, d31 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sshl v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshl v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshl v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshl v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshll v0.2d, v0.2s, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshll2 v0.4s, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sshll2 v0.4s, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshr d15, d16, #12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshr v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshr v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sshr v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sshr v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshr v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshr v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshr v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sshr v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshr v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sshr v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sshr v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssra d18, d12, #21 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssra v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssra v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssra v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssra v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssra v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssra v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssra v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssra v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssra v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssra v0.8h, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubl2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubw v0.2d, v0.2d, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubw v0.4s, v0.4s, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubw v0.8h, v0.8h, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubw2 v0.2d, v0.2d, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubw2 v0.4s, v0.4s, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ssubw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssra v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ssubw2 v0.8h, v0.8h, v0.16b # CHECK-NEXT: - - - - - - - - - - - 1.00 st1 { v0.16b }, [x0] # CHECK-NEXT: - - - - - - - - - - - 2.00 st1 { v0.2d, v1.2d, v2.2d }, [x0], #48 # CHECK-NEXT: - - - - - - - - - - - 4.00 st1 { v0.2d, v1.2d, v2.2d, v3.2d }, [x0] @@ -2923,86 +2923,86 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - - - - - - - - 2.00 st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0] # CHECK-NEXT: - - - - - - - - - - - 2.00 st4 { v0.b, v1.b, v2.b, v3.b }[9], [x0], x5 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sub d15, d5, d16 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - sub v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - sub v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd b19, b14 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd d18, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd h20, h15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd s21, s12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - suqadd v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - suqadd v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - suqadd v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - suqadd v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbl v0.16b, { v0.16b }, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbl v0.16b, { v0.16b, v1.16b }, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - suqadd v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - tbl v0.16b, { v0.16b }, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - tbl v0.16b, { v0.16b, v1.16b }, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - tbl v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - tbl v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbl v0.8b, { v0.16b }, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbl v0.8b, { v0.16b, v1.16b }, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbl v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbl v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbx v0.16b, { v0.16b }, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbx v0.16b, { v0.16b, v1.16b }, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - tbx v0.16b, { v0.16b }, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - tbx v0.16b, { v0.16b, v1.16b }, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - tbx v0.16b, { v0.16b, v1.16b, v2.16b }, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - tbx v0.16b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbx v0.8b, { v0.16b }, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbx v0.8b, { v0.16b, v1.16b }, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbx v0.8b, { v0.16b, v1.16b, v2.16b }, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - tbx v0.8b, { v0.16b, v1.16b, v2.16b, v3.16b }, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn1 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - trn1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - trn1 v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn1 v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn1 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - trn1 v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn1 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn1 v0.8h, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn2 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - trn1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - trn2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - trn2 v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn2 v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn2 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - trn2 v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn2 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - trn2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - trn2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaba v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabal v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabal2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabal2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabd v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabdl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabdl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabdl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabdl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabdl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uabdl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabdl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabdl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabdl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabdl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabdl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uabdl2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uadalp v0.1d, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uadalp v0.2d, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uadalp v0.2d, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uadalp v0.2s, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uadalp v0.4h, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uadalp v0.4s, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uadalp v0.8h, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uadalp v0.4s, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uadalp v0.8h, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddl2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddlp v0.1d, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddlp v0.2d, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddlp v0.2d, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddlp v0.2s, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddlp v0.4h, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddlp v0.4s, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddlp v0.8h, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddw v0.2d, v0.2d, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddw v0.4s, v0.4s, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddw v0.8h, v0.8h, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddw2 v0.2d, v0.2d, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddw2 v0.4s, v0.4s, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uaddw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddlp v0.4s, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddlp v0.8h, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uaddw2 v0.8h, v0.8h, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ucvtf d21, d14 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ucvtf d21, d14, #64 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ucvtf s22, s13 @@ -3015,197 +3015,197 @@ zip2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ucvtf v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ucvtf v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ucvtf v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uhadd v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uhadd v0.8h, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uhsub v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umax v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umax v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umax v0.8h, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umaxp v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umaxp v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umaxp v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uhadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uhadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uhsub v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umax v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umax v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umax v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umaxp v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umaxp v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umaxp v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umin v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umin v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umin v0.8b, v0.8b, v0.8b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uminp v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uminp v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uminp v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlal v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlal v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlal v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlal2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlal2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlal2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlsl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlsl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlsl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlsl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlsl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umlsl2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umull v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umull v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umull v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umull2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umull2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - umull2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlal v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlal v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlal v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlal2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlal2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlal2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlsl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlsl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlsl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlsl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlsl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umlsl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umull v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umull v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umull v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umull2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umull2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - umull2 v0.8h, v0.16b, v0.16b # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqadd h0, h1, h5 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqadd v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshl b11, b20, b30 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshl s23, s20, s16 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshl v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshl v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshl v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqrshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqrshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqrshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqrshl v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn b10, h12, #5 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn h12, s10, #14 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn s10, d10, #25 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn v0.2s, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn v0.4h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqrshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqrshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqrshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqrshrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl b11, b20, b30 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl b18, b15, #6 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl d15, d12, #19 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl h11, h18, #7 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl s14, s19, #18 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl s23, s20, s16 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.2d, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshl v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshl v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshl v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.4s, v0.4s, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshl v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshl v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.8h, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshl v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshl v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn b12, h10, #7 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn h10, s14, #5 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn s10, d12, #13 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn v0.2s, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn v0.4h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn v0.8b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn2 v0.16b, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn2 v0.4s, v0.2d, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqshrn2 v0.8h, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshrn2 v0.16b, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshrn2 v0.4s, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqshrn2 v0.8h, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqsub d16, d16, d16 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqsub v0.4h, v0.4h, v0.4h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn b18, h18 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn h20, s17 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn s19, d14 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn v0.2s, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn v0.4h, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn v0.8b, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn2 v0.16b, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn2 v0.4s, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uqxtn2 v0.8h, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqxtn v0.2s, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqxtn v0.4h, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqxtn v0.8b, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqxtn2 v0.16b, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqxtn2 v0.4s, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uqxtn2 v0.8h, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urecpe v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urecpe v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urhadd v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urhadd v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urhadd v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urecpe v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urhadd v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urhadd v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urhadd v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshl d8, d7, d4 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshl v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshl v0.2d, v0.2d, v0.2d -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshl v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urshl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urshl v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urshl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urshl v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshr d20, d23, #31 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshr v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshr v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urshr v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urshr v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshr v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshr v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshr v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urshr v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshr v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - urshr v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - urshr v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - - - 9.00 - - - - - ursqrte v0.2s, v0.2s # CHECK-NEXT: - - - - - - 9.00 - - - - - ursqrte v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ursra d18, d10, #13 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ursra v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ursra v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ursra v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ursra v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ursra v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ursra v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ursra v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ursra v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ursra v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ursra v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ursra v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushl d0, d0, d0 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushl v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushl v0.4s, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushl v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ushl v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ushl v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ushl v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushll v0.4s, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushll2 v0.8h, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ushll2 v0.8h, v0.16b, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushr d10, d17, #18 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushr v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushr v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ushr v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ushr v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushr v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushr v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushr v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ushr v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushr v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - ushr v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - ushr v0.8h, v0.8h, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd b19, b14 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd d18, d22 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd h20, h15 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd s21, s12 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usqadd v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usqadd v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usqadd v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usqadd v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usqadd v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usra d20, d13, #61 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usra v0.16b, v0.16b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usra v0.2d, v0.2d, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usra v0.16b, v0.16b, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usra v0.2d, v0.2d, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usra v0.2s, v0.2s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usra v0.4h, v0.4h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usra v0.4s, v0.4s, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usra v0.4s, v0.4s, #3 # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usra v0.8b, v0.8b, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usra v0.8h, v0.8h, #3 -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubl v0.2d, v0.2s, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubl v0.4s, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubl v0.8h, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubl2 v0.2d, v0.4s, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubl2 v0.4s, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubl2 v0.8h, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubw v0.2d, v0.2d, v0.2s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubw v0.4s, v0.4s, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubw v0.8h, v0.8h, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubw2 v0.2d, v0.2d, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubw2 v0.4s, v0.4s, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - usubw2 v0.8h, v0.8h, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp1 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usra v0.8h, v0.8h, #3 +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubl v0.2d, v0.2s, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubl v0.4s, v0.4h, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubl v0.8h, v0.8b, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubl2 v0.2d, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubl2 v0.4s, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubl2 v0.8h, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubw v0.2d, v0.2d, v0.2s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubw v0.4s, v0.4s, v0.4h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubw v0.8h, v0.8h, v0.8b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubw2 v0.2d, v0.2d, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubw2 v0.4s, v0.4s, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - usubw2 v0.8h, v0.8h, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uzp1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uzp1 v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp1 v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp1 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uzp1 v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp1 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp1 v0.8h, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp2 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uzp1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uzp2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uzp2 v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp2 v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp2 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uzp2 v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp2 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - uzp2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - uzp2 v0.8h, v0.8h, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - xtn v0.2s, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - xtn v0.4h, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - xtn v0.8b, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - xtn2 v0.16b, v0.8h # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - xtn2 v0.4s, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - xtn2 v0.8h, v0.4s -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip1 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip1 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - zip1 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - zip1 v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip1 v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip1 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip1 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - zip1 v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip1 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip1 v0.8h, v0.8h, v0.8h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip2 v0.16b, v0.16b, v0.16b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip2 v0.2d, v0.2d, v0.2d +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - zip1 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - zip2 v0.16b, v0.16b, v0.16b +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - zip2 v0.2d, v0.2d, v0.2d # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip2 v0.2s, v0.2s, v0.2s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip2 v0.4h, v0.4h, v0.4h -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip2 v0.4s, v0.4s, v0.4s +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - zip2 v0.4s, v0.4s, v0.4s # CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip2 v0.8b, v0.8b, v0.8b -# CHECK-NEXT: - - - - 0.50 0.50 - - - - - - zip2 v0.8h, v0.8h, v0.8h +# CHECK-NEXT: - - - - 1.00 1.00 - - - - - - zip2 v0.8h, v0.8h, v0.8h