forked from OSchip/llvm-project
To ensure that we have more accurate line information for a block
don't elide the branch instruction if it's the only one in the block, otherwise it's ok. PR9796 and rdar://11215207 llvm-svn: 154417
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@ -821,8 +821,11 @@ FastISel::SelectInstruction(const Instruction *I) {
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/// the CFG.
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/// the CFG.
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void
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void
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FastISel::FastEmitBranch(MachineBasicBlock *MSucc, DebugLoc DL) {
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FastISel::FastEmitBranch(MachineBasicBlock *MSucc, DebugLoc DL) {
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if (FuncInfo.MBB->isLayoutSuccessor(MSucc)) {
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// The unconditional fall-through case, which needs no instructions.
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if (FuncInfo.MBB->getBasicBlock()->size() > 1 && FuncInfo.MBB->isLayoutSuccessor(MSucc)) {
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// For more accurate line information if this is the only instruction
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// in the block then emit it, otherwise we have the unconditional
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// fall-through case, which needs no instructions.
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} else {
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} else {
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// The unconditional branch case.
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// The unconditional branch case.
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TII.InsertBranch(*FuncInfo.MBB, MSucc, NULL,
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TII.InsertBranch(*FuncInfo.MBB, MSucc, NULL,
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@ -5,7 +5,7 @@ define i32 @t1(i32 %a, i32 %b) nounwind uwtable ssp {
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entry:
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entry:
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; THUMB: t1:
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; THUMB: t1:
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; ARM: t1:
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; ARM: t1:
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%x = add i32 %a, %b
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br i1 1, label %if.then, label %if.else
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br i1 1, label %if.then, label %if.else
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; THUMB-NOT: b LBB0_1
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; THUMB-NOT: b LBB0_1
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; ARM-NOT: b LBB0_1
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; ARM-NOT: b LBB0_1
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@ -24,6 +24,7 @@ if.then2: ; preds = %if.else
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br label %if.end6
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br label %if.end6
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if.else3: ; preds = %if.else
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if.else3: ; preds = %if.else
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%y = sub i32 %a, %b
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br i1 1, label %if.then5, label %if.end
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br i1 1, label %if.then5, label %if.end
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; THUMB-NOT: b LBB0_5
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; THUMB-NOT: b LBB0_5
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; ARM-NOT: b LBB0_5
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; ARM-NOT: b LBB0_5
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