To ensure that we have more accurate line information for a block

don't elide the branch instruction if it's the only one in the block,
otherwise it's ok.

PR9796 and rdar://11215207

llvm-svn: 154417

llvm/lib/CodeGen/SelectionDAG/FastISel.cpp

@@ -821,8 +821,11 @@ FastISel::SelectInstruction(const Instruction *I) {
 /// the CFG.
 void
 FastISel::FastEmitBranch(MachineBasicBlock *MSucc, DebugLoc DL) {
-  if (FuncInfo.MBB->isLayoutSuccessor(MSucc)) {
-    // The unconditional fall-through case, which needs no instructions.
+
+  if (FuncInfo.MBB->getBasicBlock()->size() > 1 && FuncInfo.MBB->isLayoutSuccessor(MSucc)) {
+    // For more accurate line information if this is the only instruction
+    // in the block then emit it, otherwise we have the unconditional
+    // fall-through case, which needs no instructions.
   } else {
     // The unconditional branch case.
     TII.InsertBranch(*FuncInfo.MBB, MSucc, NULL,

llvm/test/CodeGen/ARM/fast-isel-br-const.ll

@@ -5,7 +5,7 @@ define i32 @t1(i32 %a, i32 %b) nounwind uwtable ssp {
 entry:
 ; THUMB: t1:
 ; ARM: t1:
-
+  %x = add i32 %a, %b  
   br i1 1, label %if.then, label %if.else
 ; THUMB-NOT: b LBB0_1
 ; ARM-NOT:  b LBB0_1
@@ -24,6 +24,7 @@ if.then2:                                         ; preds = %if.else
   br label %if.end6
 
 if.else3:                                         ; preds = %if.else
+  %y = sub i32 %a, %b
   br i1 1, label %if.then5, label %if.end
 ; THUMB-NOT: b LBB0_5
 ; ARM-NOT:  b LBB0_5